Search Results for "opencl-z"

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6 programs for "opencl-z" with 2 filters applied:

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  • 1
    eLogSim

    eLogSim

    Digital circuit simulator

    eLogSim is an event driven, 4-level (0,X,1,Z) digital circuit simulator. It uses a test oriented stimulus approach and offers a statistical (or exhaustive if it makes sense) fault simulation option. eLogSim has a simple GUI and is pre-compiled for Ubuntu 20, Mint 20, CentOS 8, openSUSE 15, FreeBSD 12, Solaris 11, Windows 10/11 & Raspbian/Raspberry PiOS Buster (32/64bit) & Ubuntu-MATE 20.04 (64 bit) operating systems. Cross platform & -network, concurrent fault simulation now available...
    Downloads: 3 This Week
    Last Update:
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  • 2
    Analog Insydes is a Mathematica toolbox for symbolic analysis of analog electronic circuits. This project provides a set of free add-ons to Analog Insydes, including a Java front-end and a native netlister for Cadence's Analog Design Environment (ADE).
    1 Review
    Downloads: 0 This Week
    Last Update:
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  • 3
    rfMaxima
    rfMaxima is an RF toolbox for the wxMaxima computer algebra system.
    Downloads: 0 This Week
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  • 4

    Java Decision Diagram Libraries (BDD)

    Java Decision Diagrams (BDD) libraries: JDD and JBDD

    This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD
    Downloads: 0 This Week
    Last Update:
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  • 5
    A GTK+/Gnome2 graphical front end for the IW3HEV Vector Network Analyzer, also has a signal generator, and It displays graphicaly SWR, Phase, Return Loss, X impedance, Serial resistance, |Z| Impedanze, and Inductance, and capacitance.
    Downloads: 0 This Week
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  • 6
    ViPEC is an network analyser for electrical networks. It takes a schematic description of an electrical network, and performs a simulation of the circuit response in the frequency domain. Output is in the form of port parameters (S, Y and Z).
    1 Review
    Downloads: 0 This Week
    Last Update:
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