Testing complex VLSI circuits, where the whole system is integrated into a single chip called System on Chip (SoC) is very challenging due to its complexity. A SoC design consists of multiple IP cores (logic, memory, analog, high speed I/O interfaces, RF, etc.) which generally use different technologies. SoC test is the appropriate combination of test solutions associated with individual cores. Cost modelling plays a vital role in reduction of test cost and time to market. This Matlab based...