Search Results for "file::rsyncp"
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Showing 64 open source projects for "file::rsyncp"
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BrightGauge, a ConnectWise solution, was started in 2011 to fill a missing need in the small-to-medium IT Services industry: a better way to manage data and provide the value of work to clients. BrightGauge Software allows you to display all of your important business metrics in one place through the use of gauges, dashboards, and client reports. Used by more than 1,800 companies worldwide, BrightGauge integrates with popular business solutions on the market, like ConnectWise, Continuum, Webroot, QuickBooks, Datto, IT Glue, Zendesk, Harvest, Smileback, and so many more. Dig deeper into your data by adding, subtracting, multiplying, and dividing one metric against another. BrightGauge automatically computes these formulas for you. Want to show your prospects how quick you are to respond to tickets? Show off your data with embeddable gauges on public sites.
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EDAUtils Converters
Free converters across IP-XACT Verilog VHDL Liberty SystemC
... verilog2lib : Create Liberty .lib library from verilog module lib2verilog : Converts Liberty .lib Cells into empty verilog modules verilog2systemc : Tool to convert Verilog into SystemC keeping the original structure as much as possible. ipxactreg2xlsreg : Converts IP-XACT Address Block file into XLSX for review and documentation purpose xls2ipxact : Creates IP-XACT Address Block file from the legacy XLS/CSV based Register Management system. -
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System Verilog Parser IEEE 1800 LRM
IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API
This parser has been developed to help users to implement their Verilog tool/utility on the top this library. It reads RTL and populates its internal data structures. There are APIs to extract the design information from the database, there are APIs to elaborate every element of the design along with basic expression evaluation capabilities. It has been bundled as an executable JAR file along with a sample application which reads a RTL file(s), elaborates and dumps it back to show the users... -
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Free VHDL Parser with Java, Python and T
IEEE VHDL-93 LRM supported parser implemented in Java, APIs Python/Tcl
... bundled as an executable JAR file along with an application which reads a RTL file(s), dumps the design units and the reverts those back. Please refer to the document for the details of the available APIs. You need Java JRE 1.6.x or above in order to use this utility. Feel free to contact the support team for any assistance. -
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jCLS
The Component Library Sorcerer
... the molesting parts of this job. Feature in progress: -Some graphical improvements -Conceptual improvements -Some improvements in the file format Features added in next Release: -Built-in tutorial -Better libraries with library browser -Save and load libraries from a file -Export library data to csv files -Automatic Update Notification -
We design our technology to make workforce management easier. APS offers core HR, payroll, benefits administration, attendance, recruiting, employee onboarding, and more.
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IEC 60870-5 104 Protocol download
IEC 104 RTU Server Client Simulator Source Code Library Win Linux
v21.06.008 Complete implementation of iec 104 protocol standard including File transfer. Make your RTU, protocol converter, Gateway, HMI, Data concentrator compatible with iec 104. *Industry Proved * Worldwide Customers Download Evaluation Kit - IEC 104 Development Bundle In the Development Bundle, We included IEC 104 Server & Client Simulator, Windows & Linux SDK. http://www.freyrscada.com/iec-60870-5-104.php http://www.freyrscada.com/iec-60870-5-104-Server-Simulator.php... -
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JQM Java Quine McCluskey
JQM - Java Quine McCluskey for minimization of Boolean functions.
Java Quine McCluskey implements the Quine McCluskey algorithm with Petrick’s Method (or the method of prime implicants) for minimization of Boolean functions. This software can be used both for learning and solving real problems. As a learning/teaching tool, it presents not only the results but also how the problem was solved as well as how to use Karnaugh Maps to solve the problem. Up to sixteen functions of sixteen variables can be minimized. A graphical interface is provided for entering... -
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myNetPCB
Community driven PCB Layout and Schematic capture software
PCB Layout and Schematic capture tool for Win/Linux/Mac. Source code at https://github.com/sergei-iliev/myNetPCB -
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TinyCAD is a program for drawing electrical circuit diagrams commonly known as schematic drawings. It supports standard and custom symbol libraries. It supports PCB layout programs with several netlist formats and can also produce SPICE simulation netlists. It is also often used to draw one-line diagrams, block diagrams, and presentation drawings. The source code for TinyCAD is now on GitHub: https://github.com/matt123p/TinyCAD Online documentation can be found here:...
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Transistor
Exploiting Mox Software "Bipolar Transistors" database
It requires db.sqlite database and images folder containing transistor's implementation pin Bipolar Transistor Database from Mox Software is not available anymore. As on many download websites it was mentioned as open sources (but no source available) I decided to rebuild if almost from scratch. As a transistor database may be useful i decide to share what I've done. It has been written in Purebasic because IDE is free till 800 lines of code written, and mainly because it's very... -
ConnectWise PSA (formerly Manage) allows you to stop working in separate systems, and helps you build a more profitable business. No more duplicate data entries, inefficient employees, manual invoices, and the inability to accurately track client service issues. Get a behind the scenes look into the award-winning PSA that automates processes for each area of business: sales, help desk, support, finance, and HR.
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Electronic Circuit Optimization
Optimer: a SPICE base electrical/ electronic circuit optimization tool
This project is dedicated to the optimization of (any) electrical and electronic circuits and components using evolutionary and heuristic algorithms incorporated with SPICE simulators (such as HSPICE, ngSPICE, etc.). We provide Optimer, which is a user graphical interface for circuit design and optimization. Website: https://www.circuitoptimization.com/ E-mail: contact@circuitoptimization.com/ -
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megatest
Run tasks/tests, get trustworthy pass/fail info rolled up
Distributed test running system. build for running simulations, quality assurance or similar where you need to run a large number of tests. Supports dependencies, iteration, disk space management and log file analysis. -
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Gerbv is an open source Gerber file (RS-274X only) viewer. Gerbv lets you load several files on top of each other, do measurements on the displayed image, etc. Besides viewing Gerbers, you may also view Excellon drill files as well as pick-place file
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TimingDrawer
Text based timing diagram generator
This tool generates timing diagrams for documenting hardware design. It reads the description from a text file with a simple syntax. It generates vector graphic (EPS, SVG or EMF format). It can be used in command line mode or with a GUI. It is written in Python and works on any platform. -
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Mod Direct Panoramic Spectrum Analyzer
Mod Direct Panoramic Spectrum Analyzer
1. Added the ability to directly work with the chip (parameter "settings.ini" - Direct=1). 2. The possibility of cyclic writing/recording from realtime to a file and subsequent playback from it is added (double click of the left mouse button anywhere in the top spectrogram). The size of the MB file is specified in the settings file (Cyclic file size=100). -
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Jumbocad
This is a very powerful Schematic and PCB layout tool for Engineer
This is a very powerful Schematic and PCB layout tool for electronic Engineer. It is very easy to use. Coming version will add the SPICE features as well as the 3D model. This tool is target for single user, so all the things such as Schematic, PCB layout, SPICE model, 3D models are all combined into a single project file "*.prj" in ZIP file format. Anyone should able to explore and see the structure of files using any zip tool. -
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Image to Excellon Converter
Convert any image to a Excellon Drill File
This application allows you to load an image file and convert it to a excellon drill file. For best result, you can adjust color, tolerance filters and circle recognition parameters and see a preview image before creating output file. Demonstration video: Coming soon! Useful information of this application through: https://imagetoexcellon.wordpress.com/ If you need to convert from image to gerber, check this app: https://sourceforge.net/projects/imagetogerberconverter... -
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GDS2HFSS is a circuit design utility to convert 2-dimensional layout file in GDS stream format into a 3-dimensional structure in electromagnetic (EM) simulator - ANSYS High Frequency Structure Simulator (HFSS).
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Project 2306 IDE Rad MacOS MCU DeveR
Electronic design and programming tools suite like Eagle, MpLab
Currently Only MacOS is Present, PreAlpha means not Ready to use, Application is provided Without Strict Garantee, License not OSI. All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned... -
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dxf2pcb
Convert DXF drawings of circuit boards to gEDA-PCB files.
This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste flags... -
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Eng-DB-2 is a light-weight engineering database. It allows to manage components/assemblies and their associated AVLs and technical documentation, assemble BOMs for finished goods and annotate these with quotations received from suppliers.
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.
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KiCadSymGenerator
KiCad Symbol Generator (Schematic Lib)
This tool can generate the KiCad schematic symbol from a plain text file. Please check the example.txt for the usage. -
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FIBEXplorer
FIBEX format viewer and navigator
Das Field Bus Exchange Format (FIBEX) ist ein XML-Austauschformat für diverse Bussysteme in vernetzten Fahrzeugen. Der Inhalt praxisrelevanter FIBEX-Dateien ist ohne entsprechende Toolunterstützung nur schwer zu fassen. Der FIBEXplorer® bietet einen vielseitigen Viewer für das FIBEX-Format. 100% FIBEX FIBEX Vergleich Linkverfolgung Working Sets Vertikale Navigation Clustered Navigation Startup Wizard By courtesy of Sulzer GmbH (http://www.sulzer.de) -
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Spider PCB
Hierarchical Schematic and PCB
This project is in a pre-alpha stage and is intended to give a rough idea about the final program. It does not do much more than draw pretty pictures. Hierarchical circuit layout is commonplace amongst IC designers, but Spider PCB brings hierarchical layout to the PCB industry. Not only is the schematic hierarchical, but also the layout. Ever wanted to lay out a 16-band equaliser, with 5 sound channels? Lots of copying and pasting on the PCB-side. Just imagine if you could lay out one...