Open Source VHDL/Verilog Education Software

VHDL/Verilog Education Software

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Browse free open source VHDL/Verilog Education Software and projects below. Use the toggles on the left to filter open source VHDL/Verilog Education Software by OS, license, language, programming language, and project status.

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  • 1
    adms
    ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Repository migrated to: https://github.com/Qucs/ADMS For checkout do: git clone https://github.com/Qucs/ADMS.git
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    Downloads: 6 This Week
    Last Update:
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  • 2

    Anie

    PID_control, real_time, matlab_simulink, xilinx_ise, fpga_spartan3e

    Embedded system design (VHDL description) based on Xilinx's Spartan3E Development Kit to perform real-time PID control and monitoring of time critical plants such as brushless DC motors, maglevs... vimeo.com/channels/anie prezi.com/gpbycavq499c/anie/
    Downloads: 0 This Week
    Last Update:
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  • 3

    Arduloko OS

    Sistema Operacional

    Sistema Operacional baseado no Ubuntu 11.04 (natty) 64bits destinado à profissionais e estudantes de eletrônica. O sistema foi gerado principalmente para trabalhos elaborados com o hardware arduino, mas foi evoluindo e hoje trabalha com vários outros equipamentos. A senha para login (Arduino ou root) é arduino. Foi criado pelo programador Uberlan G. Soares. Para baixar pelo DropBox, eis o link: http://dl.dropbox.com/u/65818773/arduloko.iso User: Arduino Pass: arduino User: Root Pass: arduino
    Downloads: 0 This Week
    Last Update:
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  • 4

    EduCPU

    Simple CPU for education

    This is a simple CPU design, written in Verilog, intended for educational purposes. The objective is to provide a simulatable processor where the source code exposes concepts in CPU microarchitecture.
    Downloads: 0 This Week
    Last Update:
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  • 5
    L2MI - Little Modem Multiple Interface is a project that provide a firmware and hardware description of an educational Modem with multiple interfaces.
    Downloads: 0 This Week
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  • 6
    The project goal is to develop several IP cores that would implement artificial neural networks using FPGA resources. These cores will be designed in such a way to allow easy integration in the Xilinx EDK framework.
    Downloads: 0 This Week
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  • 7

    OpenShader

    Open architecture GPU simulator and implementation

    Documentation, simulator, compiler, and Verilog implementation of a completely open-architecture graphics processing unit. This design is intended for academic and commercial purposes. The first step is to develop a detailed GPU simulator and compiler. The second step is to implement the GPU in synthesizable Verilog. The third step is to develop a feedback loop between the simulator and implementation, allowing power, performance, and reliability aspects of the hardware to feed back into ever more detailed and accurate simulations of a complete GPU. LICENSING Primary licensing is GPLv3. Secondary is Commercial. Commercial licensing (use incompatible with GPLv3) will be available via an elected or appointed non-profit Facilitator. Revenue will be invested per the discretion of the Facilitator and an advisory board. By contributing to this project, you agree to these terms. [See our Wiki for more information](https://sourceforge.net/p/openshader/wiki/)
    Downloads: 0 This Week
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  • 8
    SAP1 is a small didactic processor created by professor Malvino.
    Downloads: 0 This Week
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  • 9
    Oscilloscope using a VGA monitor and a cpld
    Downloads: 0 This Week
    Last Update:
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  • 10
    Meus arquivos de mestrado
    Downloads: 0 This Week
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  • 11
    A verilog language compiler written using Java and JavaCC. It produces a netlist, an ascii text file, of all the cell connections. It can compile very large circuits comprised of many modules.
    Downloads: 0 This Week
    Last Update:
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