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Doxverilog is a nativ Verilog/SystemVerilog parser for the Doxygen documentation generator. This allows the production of advanced documentation from Verilog/SystemVerilog sourcecode.
Tools for extracting and transforming XML-like mark-up, embedded in source code comments, into proper external entities or well-formed XML files. Can be used for JavaDoc-like "literate programming", or embedding other build-related or CM metadata.