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The "Open On-Chip Debugger" provides JTAG/SWD access from GDB (or directly with TCL scripts) to processors with ARM and MIPS based cores. See website for full list of supported targets.

...Detection and reconstruction of C++ class hierarchies (RTTI, vtables). Signature-based removal of statically linked library code. Static analysis of executable files with detailed information. We currently support Windows (7 or later), Linux, macOS, and (experimentally) FreeBSD. An installed version of RetDec requires approximately 5 to 6 GB of free disk space.

This is a general purpose machine code manipulation library for IA-32 and Intel 64 architectures. The library supports UNIX-like systems as well as Windows and is highly portable. The FCML library is free for commercial and non-commercial use as long as the terms of the LGPL license are met. Currently it supports such features as: - A one-line disassembler - A one-line assembler - An experimental multi-pass load-and-go assembler (Multi line!) - Support for the Intel and AT&T syntax - An...

A disassembler and a simulator for the MSP430 CPU. Both programs only read TI-TXT files. Licensed under the Simple Public License (SimPL) 2.0. For full license information, please read license.txt. Compiled executables are available for Windows and Mac OS X. Linux users will have to compile their own binaries. Instructions for compilation are included in README.txt. A Qt-based GUI is available for sim430. Binaries only for OS X, for now. Source files can be found in src/qt folder.

A standalone powerpc disassembler written as a wrapper over GNU libopcode library. It accepts the opcode ( in hex or decimal ) as it's argument and spits the disassembled output. Recently, a reference assembler has been added. It takes the instruction in string form and spits the assembled 32-bit opcode.It's not fully tested and may not work always.