Demo of Simulink to C++ C or HDL FGA for HFT potential
Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/
This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.
This is a simple DES algorithm implemented in FPGA platform. Mainly this system was written by C and interpreted into VHDL.
Iterative implementation for finding shortest distance using kd trees
Iterative implementation of an algorithm for finding the shortest distance between two points using kd trees for further implementation in hardware.
This is an image coder with fixed sampling, at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with res. up to 352x288).
The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
The aim is to develop a foundation for a FPGA hardware platform able to run Linux kernel and software. It must be easy to add hardware accelerated ip-cores to the FPGA. Ethernet and TCP/IP is a corner stone of the hardware and software.