Search Results for "electronic simulation"

Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this...

VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.

A portable loudspeaker design system supporting measurement, modeling, simulation and optimization of boxes, filters and systems.

TinyCAD is a program for drawing electrical circuit diagrams commonly known as schematic drawings. It supports standard and custom symbol libraries. It supports PCB layout programs with several netlist formats and can also produce SPICE simulation netlists. It is also often used to draw one-line diagrams, block diagrams, and presentation drawings. The source code for TinyCAD is now on GitHub: https://github.com/matt123p/TinyCAD Online documentation can be found here:...

eLogSim is an event driven, 4-level (0,X,1,Z) digital circuit simulator. It uses a test oriented stimulus approach and offers a statistical (or exhaustive if it makes sense) fault simulation option. eLogSim has a simple GUI and is pre-compiled for Ubuntu 20, Mint 20, CentOS 8, openSUSE 15, FreeBSD 12, Solaris 11, Windows 10/11 & Raspbian/Raspberry PiOS Buster (32/64bit) & Ubuntu-MATE 20.04 (64 bit) operating systems. Cross platform & -network, concurrent fault simulation now available....

Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.

SystemC-WMS (Wave Mixed Signal Simulator) is a class library that extends the standard SystemC kernel to allow modeling and simulation of complex systems comprising analog parts from heterogeneous domain (electrical, mechanical, thermal, ...).

QSapecNG is a Qt-based symbolic analysis program for linear analog circuits. In fact, it consists of two indipendently parts: the SapecNG framework engine, and the application gui QSapecNG.

This is a tool developed by 2nd yr CSE B.Techs at IIT Guwahati.We have designed a software in C++ language which,given some design specifications of an analog amplifier generates a netlist file in the current folder which can be opened in LTSpice.

The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.

Spice+ is a general-purpose circuit simulation program, based directly on SPICE 3F.5 from the University of California (Berkeley). An improved version of Spice for DOS, Windows and Linux. http://spicep.sourceforge.net

YAPI (Y-chart Application Programmers' Interface aka Yet Another Programmers' Interface) is a C++ library for writing (Kahn) Process Networks.

A Hardware/Software Co-Simulation package utilizing TCP/IP networking to allow C and Perl based development simulation environments using Verilog or SystemC hardware models.

decida is [de]vice & [ci]rcuit [d]ata [a]nalysis. It is used for electron device characterization, procedural simulation/analysis of electronic circuits, or more general data analysis tasks.

The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.

Tool-independent Makefile generator for VHDL models.