Search Results for "simulation project"

The riscv-boom project (also called BOOM or SonicBOOM) implements a high-performance, synthesizable out-of-order RISC-V core written in the Chisel hardware construction language. It targets the RV64GC (i.e. 64-bit with general + compressed + floating point) instruction set and supports features such as virtual memory, caches, atomics, and IEEE-754 floating point. The design is parameterizable, meaning users can tune pipeline widths, buffer sizes, functional units, and other...

The Simulation Interoperability Standards Organization (SISO) [http://www.sisostds.org] has developed a standard XML schema for representing simulation federation engineering agreements. This project is an editor for creating federation engineering documents compliant with that schema.

The Xholon project explores: software as systems of linked nodes, organized hierarchically. The Xholon toolkit supports this back-to-basics approach, and demonstrates practical benefits through examples from numerous domains.