A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
State Dependency deconstructor and mapper for C source code.
Flowcharts not telling you what you want to know about some C source code? Try a State Dependency map!
Every C source file is an implemention of a state machine. Implicit in the definition of a state machine is a network of dependencies between the states.
The Automalator
* deconstructs the C code into the core state machine
* collates the transactions into the dependency net
* generates a diagram-format file with the states and dependencies as the nodes and edges. ...
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