With up to 25k MAUs and unlimited Okta connections, our Free Plan lets you focus on what you do best—building great apps.
You asked, we delivered! Auth0 is excited to expand our Free and Paid plans to include more options so you can focus on building, deploying, and scaling applications without having to worry about your security. Auth0 now, thank yourself later.
Try free now
Full-stack observability with actually useful AI | Grafana Cloud
Our generous forever free tier includes the full platform, including the AI Assistant, for 3 users with 10k metrics, 50GB logs, and 50GB traces.
Built on open standards like Prometheus and OpenTelemetry, Grafana Cloud includes Kubernetes Monitoring, Application Observability, Incident Response, plus the AI-powered Grafana Assistant. Get started with our generous free tier today.
A set of tools relating to an educational processor used in teaching Computer Architecture at the University of Ottawa. Currently includes a working assembler and a semi-functional emulator/debugger.
A userland debugger (featuring kernel memory access) capable of debugging x32 and native x64 bit applications. The Debugger is using SDL with the look and feel of a well known one
This is a open source edited Version of the FTC controller station. the difference between the FTC controller station and the Field Timer is that the Field timer has a Timer attached to it that starts and stops the robot at the correct time
AvroraZ is the branch of Avrora from the Cork Institute of Technology, Cork, Ireland aimed at improving MicaZ support thus enabling IEEE 802.15.4 compliant emulations
l3lang is a persistent Python-like language and the l3gui provides a
worksheet-like interface where computed values can be examined via
simple selection and scripts can be assembled as structures.
The stack tracer is an delphi library for help to make exception handling to informative. The library is written for Delphi 7, but i think will work also on the 5 and 6 versions.
AI-powered service management for IT and enterprise teams
Enterprise-grade ITSM, for every business
Give your IT, operations, and business teams the ability to deliver exceptional services—without the complexity. Maximize operational efficiency with refreshingly simple, AI-powered Freshservice.
Microdev is a complete development tool dedicated to microcontroller based boards. It is composed of a graphical and real time simulator and a full featured editor supporting Picbasic, JAL and Asm.
A tool to monitor and analyse data transmitted between clients
and a server through a TCP connection. This tool focuses on the data stream
(software layer), not on the lower level transmission protocol as
packet sniffers do.
The XPS is a scalable platform for meta-programming and domain engineering. It provides a virtual machine, compiler, and runtime library that make it possible to efficiently develop, debug, and run programs based on XPL (eXtensible Programming Language)
JTAG base library, ARM7TDMI and MIPS debugger stubs for GDB.
Extendable architecture to add JTAG device drivers, debuggers, and custom JTAG applications.
File-Spector is a small, fast and easy to use binary file analyzer and Inspector.
It allows the users to format a complete binary file structure and then use it to read any binary file that matches the specified format.
GPICD - The GNU PIC Programmer and In-Circuit Debugger.
GPICD is an open-source Programmer and In-Circuit debugger for the Microchip (TM) PIC (TM) family of microcontrollers. It is an ideal complement for the gputils development tool set.
This Project should give me the experience to develop a engine. It should not be only a set of libraries. It contains a set of Frontends, wrapper-functions, scripts and so on. The head of this Project is a physique-engine.
Language used: c++
Libraries used: fltk
OS: Linux
Problem Description: Jtag management software for CPLD and jtag aware chips
Major features: X11 UI, c++ platform for jtag apps
Data formats: jtag, bsdl, binary
Derived from existing project "jtag"
VICS, Verification of an Implementation Conforming to its Specification, aims to check the correctness of a refinement of the B formal method (http://www-lsr.imag.fr/B/Bsite-pages.html). More info on http://vics.sourceforge.net
The beSee-2-x architecture brings JVM wide instrumentation for AOP systems, independant from bytecode kit (BCEL, Javassist).
A plugin is provided to instrument BEA WebLogic (v7) for tracing purpose (servlet->EJB->CMP->DB), with full JMX capabilities.
This is a simulator for the SMIS research MRI consoles. It executes compiled pulse sequences, and emulates the MR3040/50, MR3031, and RF cards. If you have an SMIS scanner, you will find this a useful pulse sequence development aid.