Search Results for "engineering" - Page 2
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Showing 56 open source projects for "engineering"
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A set of tools relating to an educational processor used in teaching Computer Architecture at the University of Ottawa. Currently includes a working assembler and a semi-functional emulator/debugger.
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A userland debugger (featuring kernel memory access) capable of debugging x32 and native x64 bit applications. The Debugger is using SDL with the look and feel of a well known one
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This is a open source edited Version of the FTC controller station. the difference between the FTC controller station and the Field Timer is that the Field timer has a Timer attached to it that starts and stops the robot at the correct time
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AvroraZ is the branch of Avrora from the Cork Institute of Technology, Cork, Ireland aimed at improving MicaZ support thus enabling IEEE 802.15.4 compliant emulations
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l3lang is a persistent Python-like language and the l3gui provides a worksheet-like interface where computed values can be examined via simple selection and scripts can be assembled as structures.
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The stack tracer is an delphi library for help to make exception handling to informative. The library is written for Delphi 7, but i think will work also on the 5 and 6 versions.
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QUASI is stand-alone AVR RISC processor simulator with debugging features, EDA-like GUI and plugin interface.
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Codemon is a testing tool that enables code coverage of C codes. It supports the level of Decision Coverage and Condition Coverage.
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Stop Storing Third-Party Tokens in Your DatabaseRolling your own OAuth token storage can be a security liability. Token Vault securely stores access and refresh tokens from federated providers and handles exchange and renewal automatically. Connected accounts, refresh exchange, and privileged worker flows included.
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Atemu and Xatdb provide a simulator and debugger for devices and networks made up of AVR microprocessor devices, such as the MICA2 Mote.
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Microdev is a complete development tool dedicated to microcontroller based boards. It is composed of a graphical and real time simulator and a full featured editor supporting Picbasic, JAL and Asm.
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This project aims to implement an LC2/LC3 assembler and simulator for the Linux and Windows platforms.
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A tool to monitor and analyse data transmitted between clients and a server through a TCP connection. This tool focuses on the data stream (software layer), not on the lower level transmission protocol as packet sniffers do.
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The XPS is a scalable platform for meta-programming and domain engineering. It provides a virtual machine, compiler, and runtime library that make it possible to efficiently develop, debug, and run programs based on XPL (eXtensible Programming Language)
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JTAG base library, ARM7TDMI and MIPS debugger stubs for GDB. Extendable architecture to add JTAG device drivers, debuggers, and custom JTAG applications.
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File-Spector is a small, fast and easy to use binary file analyzer and Inspector. It allows the users to format a complete binary file structure and then use it to read any binary file that matches the specified format.
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GPICD - The GNU PIC Programmer and In-Circuit Debugger. GPICD is an open-source Programmer and In-Circuit debugger for the Microchip (TM) PIC (TM) family of microcontrollers. It is an ideal complement for the gputils development tool set.
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This Project should give me the experience to develop a engine. It should not be only a set of libraries. It contains a set of Frontends, wrapper-functions, scripts and so on. The head of this Project is a physique-engine.
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Language used: c++ Libraries used: fltk OS: Linux Problem Description: Jtag management software for CPLD and jtag aware chips Major features: X11 UI, c++ platform for jtag apps Data formats: jtag, bsdl, binary Derived from existing project "jtag"
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VICS, Verification of an Implementation Conforming to its Specification, aims to check the correctness of a refinement of the B formal method (http://www-lsr.imag.fr/B/Bsite-pages.html). More info on http://vics.sourceforge.net
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The beSee-2-x architecture brings JVM wide instrumentation for AOP systems, independant from bytecode kit (BCEL, Javassist). A plugin is provided to instrument BEA WebLogic (v7) for tracing purpose (servlet->EJB->CMP->DB), with full JMX capabilities.
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This is a simulator for the SMIS research MRI consoles. It executes compiled pulse sequences, and emulates the MR3040/50, MR3031, and RF cards. If you have an SMIS scanner, you will find this a useful pulse sequence development aid.
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A suite of reverse engineering tools for ELF executables and any operating system that supports it, including numerous gdb patches.
