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Showing 38 open source projects for "eda"
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Sweetviz
Visualize and compare datasets, target values and associations
Sweetviz is an open-source Python library that generates beautiful, high-density visualizations to kickstart EDA (Exploratory Data Analysis) with just two lines of code. Output is a fully self-contained HTML application. The system is built around quickly visualizing target values and comparing datasets. Its goal is to help quick analysis of target characteristics, training vs testing data, and other such data characterization tasks. Shows how a target value (e.g. -
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TimingEditor
TimingEditor is a tool to graphically draw and edit timing diagrams.
TimingEditor is a tool to graphically draw and edit timing diagrams. -
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A program by Frederik De Kegel, to control a model rail road with the Intellibox of Uhlenbrock and Modeltreno. Een programma van Frederik De Kegel, om een modeltrein te besturen met de Intellibox van Uhlenbrock en Modeltreno.
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TimingDrawer
Text based timing diagram generator
This tool generates timing diagrams for documenting hardware design. It reads the description from a text file with a simple syntax. It generates vector graphic (EPS, SVG or EMF format). It can be used in command line mode or with a GUI. It is written in Python and works on any platform. -
Train ML Models With SQL You Already KnowBuild and deploy ML models using familiar SQL. Automate data prep with built-in Gemini. Query 1 TB and store 10 GB free monthly.
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Mod Direct Panoramic Spectrum Analyzer
Mod Direct Panoramic Spectrum Analyzer
1. Added the ability to directly work with the chip (parameter "settings.ini" - Direct=1). 2. The possibility of cyclic writing/recording from realtime to a file and subsequent playback from it is added (double click of the left mouse button anywhere in the top spectrogram). The size of the MB file is specified in the settings file (Cyclic file size=100). -
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Penthode
Penthode simulates, draw and plot electrical power distributions
Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design -
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Ycad is a library of CAD functions in Java. Currently only DXF is supported for reading, viewing and writing. The DXF drawing may be rendered to a Graphics object for printing or imaging.
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FIBEXplorer
FIBEX format viewer and navigator
Das Field Bus Exchange Format (FIBEX) ist ein XML-Austauschformat für diverse Bussysteme in vernetzten Fahrzeugen. Der Inhalt praxisrelevanter FIBEX-Dateien ist ohne entsprechende Toolunterstützung nur schwer zu fassen. Der FIBEXplorer® bietet einen vielseitigen Viewer für das FIBEX-Format. 100% FIBEX FIBEX Vergleich Linkverfolgung Working Sets Vertikale Navigation Clustered Navigation Startup Wizard By courtesy of Sulzer GmbH (http://www.sulzer.de) -
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This is a collection of (hopefully) useful productivity enhancements of Mentor Graphics IC-Station tools
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Go From AI Idea to AI App FastAccess Gemini 3 and 200+ models. Build chatbots, agents, or custom models with built-in monitoring and scaling.
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Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.
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CAPLET
GDS visualization and parallelized capacitance extraction
Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material. -
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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.
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Gaphor is a UML modeling environment written in Python. Gaphor is small and very extensible. The repository is located at http://github.com/gaphor/gaphor.
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The Virtual Electronics Library, or VE-Lib, is a C++ library used to easily add electronic simulation in your programs. It makes use of the scripting language Lua to easily add new components like new resistors and microchips.
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This is an attempt to build an Java GUI for a low cost digital storage oscilosope based on a RS232 interface.
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The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.
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Berenice is 3D visualasion tool for electronic printed boards design. It can take design made in Eagle or any other pcb tool and visualise, rotate, zoom, move and pick in nearly real world view.
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Generic packet visualization tool for generating flow diagrams from formatted logs. Can be used for cache coherency diagrams, software interaction diagrams or to plot network communications.
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Circuit Sandbox
Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox -
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Hierarchical VCD Viewer is new trace file viewer. It's based on Qt 3.3.4 (migrating to Qt 4.1) graphic library and its main feature is to provide a hierarchical view of VCD trace file.
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A GTK+/Gnome2 graphical front end for the IW3HEV Vector Network Analyzer, also has a signal generator, and It displays graphicaly SWR, Phase, Return Loss, X impedance, Serial resistance, |Z| Impedanze, and Inductance, and capacitance.
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"cif2tribes" is a console-based tool for converting integrated circuit layouts into maps usable in the game Tribes 2, as a 3D visualization aid. The project code is modular enough to be easily extended to different game engines and input file formats.
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decida is [de]vice & [ci]rcuit [d]ata [a]nalysis. It is used for electron device characterization, procedural simulation/analysis of electronic circuits, or more general data analysis tasks.
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An automatic 2D Delaunay mesh generator and solver for Finite Element Analysis. Can solve 2D field problems (Poisson and Helmholtz Equations). Can use LAPACK/ARPACK solvers producing OpenGL/Postscript output. Uses C/GTK/GTKGLExt/MFC. Runs on Win32/Unix.
