Search Results for "open hardware monitor"
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Showing 33 open source projects for "open hardware monitor"
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BSC
Bluespec Compiler (BSC)
BSC is the open source compiler toolchain for Bluespec SystemVerilog, a high-level, rule-based hardware design language. It translates Bluespec descriptions into synthesizable Verilog, letting developers bring typed, modular abstractions into mainstream FPGA/ASIC flows. The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. -
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ispc
Intel SPMD Program Compiler
ispc is a compiler for a variant of the C programming language, with extensions for single programs, and multiple data programming. Under the SPMD model, the programmer writes a program that generally appears to be a regular serial program, though the execution model is actually that a number of program instances execute in parallel on the hardware. ispc compiles a C-based SPMD programming language to run on the SIMD units of CPUs and GPUs; it frequently provides a 3x or more speedup on... -
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Clash
Haskell to VHDL/Verilog/SystemVerilog compiler
...Clash is an open-source project, licensed under the permissive BSD2 license, and actively maintained by QBayLogic. The Clash project is a Haskell Foundation affiliated project. Clash is built on Haskell which provides an excellent foundation for well-typed code. Together with Clash's standard library it is easy to build scalable and reusable hardware designs. -
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tvm
Open deep learning compiler stack for cpu, gpu, etc.
Apache TVM is an open source machine learning compiler framework for CPUs, GPUs, and machine learning accelerators. It aims to enable machine learning engineers to optimize and run computations efficiently on any hardware backend. The vision of the Apache TVM Project is to host a diverse community of experts and practitioners in machine learning, compilers, and systems architecture to build an accessible, extensible, and automated open-source framework that optimizes current and emerging machine learning models for any hardware platform. ... -
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GHDL
VHDL 2008/93/87 simulator
This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. ... -
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OpenJ9
A Java Virtual Machine for OpenJDK
A Java Virtual Machine for OpenJDK that's optimized for small footprint, fast start-up, and high throughput. Builds on Eclipse OMR and combines with the Extensions for OpenJDK for OpenJ9 repo. We're not sure which route you might have taken on your way here, but we're really pleased to see you! If you came directly from our website, you've probably already learned a lot about Eclipse OpenJ9 and how it fits into the OpenJDK ecosystem. Eclipse OpenJ9 is an independent implementation of a Java... -
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Virtual T is a TRS-80 Model 100/102/200 emulator that runs on Windows, Linux, and Macintosh. The goal of Virtual T is to provide 100% hardware emulation so any existing programs will run. It also adds powerful development and debugging tools.
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Selfie
An educational software system of a tiny self-compiling C compiler
An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor. Selfie is a project of the Computational Systems Group at the Department of Computer Sciences of the University of Salzburg in Austria. The Selfie Project provides an educational platform for teaching undergraduate and graduate students the design and implementation of programming languages and runtime systems. The focus is on the construction... -
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Intel compute-runtime
Intel® Graphics Compute Runtime
The Intel(R) Graphics Compute Runtime for oneAPI Level Zero and OpenCL(TM) Driver is an open source project providing compute API support (Level Zero, OpenCL) for Intel graphics hardware architectures (HD Graphics, Xe). -
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X10
Performance and Productivity at Scale
X10 is a class-based, strongly-typed, garbage-collected, object-oriented language. To support concurrency and distribution, X10 uses the Asynchronous Partitioned Global Address Space programming model (APGAS). This model introduces two key concepts -- places and asynchronous tasks -- and a few mechanisms for coordination. With these, APGAS can express both regular and irregular parallelism, message-passing-style and active-message-style computations, fork-join and bulk-synchronous... -
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JNode is a Java New Operating system Design Effort. JNode is a simple to use and install Java operating system for personal use on modern devices. Any java application runs on it, fast and safe. See our homepage for additional information.
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xSTreamC is a streaming language developed by STMicroelectronics to support the mapping of data intensive streaming applications on distributed multiprocessor SoCs. A compiler and a simulation library are provided.
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A gentoo derived netboot node and build system for use with Distcc (Distrubuted C Compiler) clusters.
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FpgaC compiles a subset of the C language to net lists which can be imported into an FPGA vendors tool chains. C provides an excellent alternative to VHDL/Verilog for algorithmic expression of FPGA reconfigurable computing tasks. More info in wiki.
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SirVer is an C# Web Server with a script language supported by the Framework .Net and Mono
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42 has six primary goals: foster extreme code reuse; run faster than C; compile to both software and hardware; run faster on reconfigurable computers; support parallel programming; and allow users to extend the language.
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Resources for the PePLink MANGA. This device with Linux embedded was marketed by PePLink (typically for Wifi and VoIP) until they withdrew it in early 2006. This project hosts the SDK, Debian image and other resources of interest to owners of this device.
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SSEPlus is a SIMD function library. It provides optimized emulation for newer SSE instructions. It also provides a rich set of high performance routines for common operations such as arithmetic, bitwise logic, and data packing and unpacking.
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gscc stands for GNU SystemC Compiler Collection, witch is a set of tools to manipulate systemc code ( systemc is a hardware description language www.systemc.org ). The most notable tool is called gsc, witch is a systemc to verilog translator.
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The MCAScript programming language consists of a subset of C# extended by special statements from hardware programming languages. It has been developed to be used within the MCA(Modular Controller Architecture) to script to behaviour of robots.
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The Register Description Language (RDL) is an object modeling language used to specify and implement software accessible hardware registers and memories. A RDL compiler can create synthesizable HDL, documentation, driver code, system-c models, and more.
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Spark is an s-expression-based language (like Lisp or Scheme) that will be built to be closer to the hardware (like C).
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MEDDAC is the seeding point for designing a new approach to Operating System design itself. It is an Open Source project with roots in mainframe design and development the author began in 1979. Monitor Editor Disassembler Decompiler Assembler Compiler
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Vdevice is an emulator and development tools for virtual hardware. Written in the .NET framework, vdevice allows the hobbyist to write software or operating systems without dealing with the overhead of an x86 or similar platform.
