Search Results for "speech synthesis source code"

glint is a tool facilitating you in development of state-oriented control entities which supposed to be used in very broad areas of programming (e.g. state-oriented network protocols). glint saves you from pondering how your finite state machine should be organized, how many states it should have and what they should mean. You just tell glint how you would like your control entity to operate and glint returns to you the synthesised magic black box which implements the desired...

autoCode4 is an engine that synthesizes controllers from formal specifications described under a subset of linear temporal logic (LTL). Importantly, it synthesizes synchronous dataflow controllers (in Lustre or in Ptolemy II form) and maintains requirement-to-code traceability. Such feature is mandated in developing safety-critical systems and are considered essential for specification validation or integrating manual implementation such as legacy code. The LTL specification captures...

A module for netbeans that allows quick implementation of the jvstWrapper java-vst programming interface from the new project dialog, including automatically created gui and parameter control.

Hippal is an integrating GUI-framework for a multimodular symbolic A.I.-system IPAL, which combines A.I. Planning, Inductive Program Synthesis, Analogical Reasoning and Learning. Hippal is client-/server-based and uses the Lili Lisp Interpreter as Centr

Synthesis is a RAD tool and C++ IDE (like VB or BCB). It eases the creation of Win32 programing though visual programming and class wizards. Using opensource framework and minGW Synthesis provides a extendable and powerful development environment.

ASSL (pronounced AY-sil), is a wrapper around CHP, an established async. process description language. This project provides a set of tools that aid the design, simulation, and synthesis of async. VLSI circuits. Common parser, independent tool projects

A behavioral synthesis tool infrastructure and software framework, translating sequential algorithms into hardware descriptions expressed in a hardware description language (HDL).