Search Results for "java vhdl"
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Showing 8 open source projects for "java vhdl"
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wxMEdit
wxMEdit, Cross-platform Text/Hex Editor, Improved Version of MadEdit
•Added automatically checking for updates •Added bookmark support •Added right-click context menu for each tab •Added purging histories support •Added selecting a line by triple click •Added FreeBASIC syntax file •Added an option to place configuration files into %APPDATA% directory under Windows •Improved support for Find/Replace •Improved Mac OS X support •Improved system integration under Windows •Improved encoding detection result •Improved Hex editing support •Added more... -
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A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.
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myScite
The allRound pocket sized CodeEditor.
Refurbished Scintilla.orgs/SciTE with some additional patches. -- Features -- - Full MinGW and GTK SDKs Autocomplete.(190+) - Do system scripting (bash, applescript, cmd, powershell, perl, j/vbscript, awk) - Examine all sorts of data files (sql, regedit, mib, xml, yaml, json, vcard ...) - Review difference and patch files - Create makefiles (gnu make / cmake) - Edit html, css and config files (with calltips) - Describe circuits in vhdl and spice. ... - And finally; read & write... -
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Notepad3
Light-weight Scintilla-based text editor with syntax highlighting
Notepad3 is a fast and light-weight Scintilla-based text editor with syntax highlighting. Notepad3 is an excellent replacement for the default Windows text editor. Notepad3 offers many extra features over Notepad. It has a small memory footprint, but is powerful enough to handle most programming jobs. -
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PLP
Powerfull pre-processor
Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc) -
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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Webcpp converts Ada95, ASP, Assembler, Basic, C, C#, C++, Cg, CLIPS, Fortran, Haskell, Java, Markup, Modula2, Objective C, Pascal, Perl, PHP, Python, Renderman, Ruby, SQL, Tcl, Unix shell, UnrealScript & VHDL into HTML with syntax highlighting and themes
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