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Next-generation sequencing short reads aligner based on Intel® MIC
Latest Code in GitHub:
https://github.com/aquaskyline/MICA-aligner
To better utilize MIC-enabled computers for NGS data analysis, we developed a new short-read aligner MICA that is optimized in view of MIC’s limitation and the extra parallelism inside each MIC core. Experiments on aligning 150bp paired-end reads show that MICA using one MIC board is ~4.85 times faster than the CPU-(multi-core)-based BWA-MEM and about the same speed as the GPU-based SOAP3-dp. Furthermore, MICA’s...
A simple CPUsimulator whose goal is to make assembly learning easier. This goal is reached giving a simple calculator, called ENIAC, with a simple CPU, called vCPU. The vCPU's instructions are very simple and easy to understand.