Search Results for "support vector machine"
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Showing 10 open source projects for "support vector machine"
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1
NASM
A cross-platform x86 assembler with an Intel-like syntax
NASM (Netwide Assembler) is a widely used, open-source assembler for the x86 architecture that provides a flexible and portable way to write low-level machine code using an Intel-style syntax. It is designed to support a wide variety of output formats, making it suitable for different operating systems and development environments. NASM is known for its simplicity and clarity, allowing developers to write assembly code that is both readable and efficient. It is commonly used in system programming, operating system development, and performance-critical applications where direct hardware control is required. ... -
2
BinExport
Export disassemblies into Protocol Buffers
BinExport is a disassembly export plugin developed by Google as part of the BinDiff ecosystem, designed for reverse engineering and binary analysis. It works with popular disassemblers including IDA Pro, Binary Ninja, and Ghidra, enabling the export of disassembly data into a structured Protocol Buffer format. This exported data can then be used for binary comparison, diffing, and advanced analysis tasks through BinDiff or other compatible tools. BinExport captures detailed information such... -
3
UniSIMD-assembler
SIMD macro assembler unified for ARM, MIPS, PPC and x86
UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel... -
4
iced
Blazing fast and correct x86/x64 disassembler, assembler, decoder, etc
iced is a powerful and feature-rich disassembly and assembly library for x86 and x64 architectures, designed to provide accurate decoding, encoding, and formatting of machine instructions. It supports multiple programming languages, including C#, Rust, and Python, making it accessible to a wide range of developers. The library offers both disassembly and assembly capabilities, allowing users to convert between machine code and human-readable instructions in both directions. It includes... -
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5
RARS
RISC-V Assembler and Runtime Simulator
RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V. -
6
Selfie
An educational software system of a tiny self-compiling C compiler
An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor. Selfie is a project of the Computational Systems Group at the Department of Computer Sciences of the University of Salzburg in Austria. The Selfie Project provides an educational platform for teaching undergraduate and graduate students the design and implementation of programming languages and runtime systems. The focus is on the construction... -
7
RedtDec
RetDec is a retargetable machine-code decompiler based on LLVM
...Detection and reconstruction of C++ class hierarchies (RTTI, vtables). Signature-based removal of statically linked library code. Static analysis of executable files with detailed information. We currently support Windows (7 or later), Linux, macOS, and (experimentally) FreeBSD. An installed version of RetDec requires approximately 5 to 6 GB of free disk space. -
8
FCML
A machine code manipulation library for Intel 64 and IA-32.
...- Support for the Intel and AT&T syntax - An instruction renderer - An instruction parser - Instructions represented as generic models - UNIX/GNU/Linux and Windows support - Portable - written entirely in C (no external dependencies) - C++ wrapper - Supported instruction sets: MMX, 3D-Now!, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AVX, AVX2, AES, TBM, BMI1, BMI2, HLE, ADX, CLMUL, RDRAND, RDSEED, FMA, FMA4, LWP, SVM, XOP, VMX, SMX, AVX-512 Source code moved to: https://github.com/swojtasiak/fcml-lib -
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FlexxCpu
Flexible and eXpandable Cpu simulation
A small simulation of an experimental customized Cpu called FlexxCpu. A virtual Cpu whose assembly instructions have been strongly influenced by old cpus architecture (8080, 6809, z80, 68k, etc...) Please support this project by donating to this fundraiser: ------------------------------------------- Give birth to new travel bicycles!!! https://gofund.me/2201d2a4 ------------------------------------------- -
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10
Machine Instructions Engine
Assembler, Disassembler, Processor Emulator
Machine Instructions Engine is the engine that can disassemble instruction, disassemble its length, assemble instructions and emulate device(processor). The engine will support Intel and AMD instructions. For now length disassembling and Intel instructions only are supported. This project is intended to be as separate library. Also you can use sources to use this engine in your projects directly.
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