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RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V.

Emulator of the ancient 8 bit microprocessor ISP-8A 500D/600D or more common "SC/MP" from National Semiconductor. The download contains all sources plus an executable Java Jar file to start right away. Some SC/MP hex dump examples are provided in directory "/etc" as well. The download also contains unit tests and some helping documentation (also in /etc). You may slow down the CPU operations, displaying the CPUs status register as LEDs, to watch the CPU working with its...

Dev65 is a macro assembler, linker and librarian suite for the 6501, 6502, 65C02, 65816 and 65832 family of microprocessors coded in Java for portability. The code is based on a framework that could support other system architectures.

This is a student project designed to compete in the 2010 IEEE Computer Society Student Competition: http://www.computer.org/portal/web/competition/2010competition The Code Red architecture is designed for extremely lower power environments, like distributed sensor networks. Included is a design of that architecture, a Java-based simulator, an implementation (without vector instructions) designed as a Logisim circuit (http://ozark.hendrix.edu/~burch/logisim/), and more. The name...

BEYE (Binary EYE) is a free, portable, advanced file viewer with built-in editor for binary, hexadecimal and disassembler modes. It contains a highlight AVR/Java/i86-AMD64/ARM-XScale/PPC-64 and other disassembler, full preview of MZ,NE,PE,ELF and other.