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A low-power ISA design and simulator for a 2010 IEEE competition
This is a student project designed to compete in the 2010 IEEE Computer Society Student Competition: http://www.computer.org/portal/web/competition/2010competition
The Code Red architecture is designed for extremely lower power environments, like distributed sensor networks. Included is a design of that architecture, a Java-based simulator, an implementation (without vector instructions) designed as a Logisim circuit (http://ozark.hendrix.edu/~burch/logisim/), and more.
The name...
nsL is a new C-like programming language for writing NSIS installation wizards (http://nsis.sourceforge.net). The nsL assembler takes nsL code and translates it into original NSIS script which can then be compiled.
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A open source java card virtual machine implementation. And also some part of the VM code can be used as part of kinds of tools such as javacard bytecode disassembler.
jbytecode is a Java bytecode disassembler/assembler written in Python. Dissasembly code is aligned with Java bytecodes in the class file so modification and re-assembly is always possible, even when class is obfuscated.
JasminParser is a Jasmin (Java Assembler, .j file) compiler based on the Apache BCEL. JasminParser provides a disassembler and an assembler to convert java classes and jasmin files to each other.
JReversePro is a Java Decompiler / Disassembler written in Java. Facility to view the ConstantPool contents is available. AWT, Swing and command-line versions are present.
JEST will be the Java bytecode engineering Swiss-Army Jackhammer.
It will include a disassembler, class browser, obfuscator, optimizer, class editor, and bytecode debugger, and have an intuitive GUI.