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RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V.

This is a student project designed to compete in the 2010 IEEE Computer Society Student Competition: http://www.computer.org/portal/web/competition/2010competition The Code Red architecture is designed for extremely lower power environments, like distributed sensor networks. Included is a design of that architecture, a Java-based simulator, an implementation (without vector instructions) designed as a Logisim circuit (http://ozark.hendrix.edu/~burch/logisim/), and more. The name "Code Red" comes from our team name, the Red Team. Since the competition dictated a small team size, our professor split the class and gave each group a color. We liked the name "Code Red" and chose it to represent our team and school's color (UMass' official color is Maroon.) ...

bMARS is a java implementation of Redcode virtual machine MARS - "Memory Array Redcode Simulator"