3 projects for "verilog-a" with 2 filters applied:

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    MatlabSimulink2CPP

    Demo of Simulink to C++ C or HDL FGA for HFT potential

    Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/
    Downloads: 0 This Week
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  • 2
    This is an image coder with fixed sampling, at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with res. up to 352x288).
    Downloads: 0 This Week
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  • 3
    The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
    Downloads: 0 This Week
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