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$ cat seaddr.asm
bits 64
mov dword [0xfee00320],32
$ nasm seaddr.asm
$ ndisasm -b 64 seaddr
00000000 C704252003E0FE20 mov dword [0xfffffffffee00320],0x20
-000000
The disassembly is correct and the displacement is actually sign-extended, so the instruction does not reference the same address as in the assembly source code.
Tested with nasm 2.06rc2-20090105.
2009-01-10 01:13:57 UTC in The Netwide Assembler
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I can reproduce this bug with the latest nasm snapshot (2.05rc7-20081020). Are you sure it's fixed?.
2008-10-22 17:27:07 UTC in The Netwide Assembler
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These instruction names are wrong:
;# Geode (Cyrix) 3DNow! additions
PFRCP mmxreg,mmxrm \323\2\x0F\x0F\110\1\x86 PENT,3DNOW,SQ,CYRIX
PFRSQRT mmxreg,mmxrm \323\2\x0F\x0F\110\1\x87 PENT,3DNOW,SQ,CYRIX
Other instructions with those names already exist. The actual names of the Geode...
2008-10-22 16:58:14 UTC in The Netwide Assembler
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This assembly:
bits 64
mov [r12*2+rax],rax
Gives this disassembly:
00000000 4A890460 mov [rax],rax
I'm guessing you need to consider REX.X when checking for the special case where SIB.index is 100b (rsp).
2008-08-20 13:17:17 UTC in The Netwide Assembler
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Also these should be "ORD" instead of "ORS":
VCMPORS_SPD ymmreg,ymmrm
VCMPORS_SPS ymmreg,ymmrm.
2008-08-08 14:12:55 UTC in The Netwide Assembler
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These should be "GT" rather than "FT":
VCMPFT_OQPD ymmreg,ymmrm
VCMPFT_OQPS ymmreg,ymmrm.
2008-08-08 14:09:42 UTC in The Netwide Assembler
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This input:
bits 64
push qword 0xffff0000
Gives this disassembly:
$ ndisasm -b 64 push
00000000 68 db 0x68
00000001 0000 add [rax],al
00000003 FF db 0xFF
00000004 FF db 0xFF
The correct disassembly ought to be "push qword 0xffffffffffff0000" (i.e. sign-extended). The 0x68 instruction is forced to a 64-bit data size.
2008-08-05 20:20:32 UTC in The Netwide Assembler
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This should work but doesn't (gives an error about mismatching operand sizes):
bits 64
jmp qword far [rax].
2008-08-05 19:23:54 UTC in The Netwide Assembler
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This input:
bits 64
test: and al, 0xf0
and ax, 0xfff0
and eax, 0xfffffff0
and rax, 0xfffffffffffffff0
and byte [rax], 0xf0
and word [rax], 0xfff0
and dword [rax], 0xfffffff0
and qword [rax], 0xfffffffffffffff0
Gives this disassembly:
00000000 24F0 and al,0xf0
00000002 6625F0FF and...
2008-08-02 17:23:24 UTC in The Netwide Assembler
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$ cat > jrcxz.asm
bits 64
test: jrcxz test
jecxz test
$ nasm jrcxz.asm ; ndisasm -b 64 jrcxz
00000000 E3FE jecxz 0x0
00000002 67E3FB jecxz 0x0
Tested with nasm-2.03.01-20080731.
2008-08-02 12:59:54 UTC in The Netwide Assembler
