Jason M. Sullivan

What's happening?

Comment: Different memory images cause simulation to hang.

Finally figured it out. It was hard to understand because the processor worked fine under most other conditions. One particular instruction used one particular piece that jammed exactly like you said. It ended up being a loop through a latch. Sorry!

2009-05-01 04:01:04 UTC in Icarus Verilog
Different memory images cause simulation to hang.

I'm working on a verilog model of a small microprocessor, and I've run into an interesting and peculiar problem. The software in the system is loaded into memory arrays via a "readmemh" call. Before running the complicated code on the microprocessor model, I ran some test code. The test code ran fine. Then I loaded up the complicated code. Remember, this was done without another call to...

2009-04-30 22:15:48 UTC in Icarus Verilog

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