Printed Circuit Board Layout Tool

I'm just working on a patchset which will make it possible to assign
distinct design rules to every layer, not to every net; however, if you
route the net in a dedicated layer, it will be the same (note that I'm
speaking about PCB layers which are united in groups to produce single
copper layer per group). if you are interested, I can push my work in
progress into my GIT repository. currently, it lacks GTK UI (the Lesstif
should work; you also can add design rules to PCB manually via external
text editor); also, I plan to add distinct design rules for `pad' layers
(component and solder).