Automatically Tuned Linear Algebra Soft.

Hi,

I'm trying to add the following few UltraSPARC architectures, so they can
be detected

T1
T2
T2+ (used on T5240 on the Sage project)
T3 (in development)
T3+
T4
T4+

The latter three are not in development, but one might guess they will
appear one day. One could consider adding them. If they are never produced,
only a few bytes are wasted.

I'm using a Sun T5240 (t2 on the Sage project). Since the T2+ is not
listed, the architecture is listed as UNKNOWN32.

There are also some UltraSPARC chips which are not tested, which I don't
mind adding if you wish. If so, I'll send you patches and you can add them
to the main code.

UltraSPARC-IIIi ... on a V240 and V440
UltraSPARC-III+ ... on a V480 and 280R
UltraSPARC-IIe ... on a SunBlade 150, Netra X1 and SunFire V100
UltraSPARC-IIi ... on an Ultra5

The UltraSPARC-III+ is used for the Blade 2000 I own, so I can generate
data for that easily enough.
It's probable we could get some people to build on them, and get some
defaults.

However, I was a bit stuck working out where to put the changes. I found

./src/backend/archinfo_sunos.c
and
CONFIG/include/atlconf.h

make what I thought were the right changes, but the system is still
reported as UNKNOWN32

Can you tell me.
1) Whether you want the new Tx processors added? (I need the T2+ myself).
2) Whether you want the older UltraSPARC processors added.
3) What files need editing.
4) How can I quickly build the code to test the architecture, so I know my
changes are working. (I can probably get some others to test the code too).

5) Whether the 'archinfo_sunos.c' file would be expected to work on Solaris
with x86 processors? In which case, it needs a whole range of chips added.

6) Anything else you think might be useful.

Thank you for your time.

Dave