VHDL Lookup Table Generator

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Description

The VHDL Lookup Table Generator generates a table in vhdl from a C++-table. I was too lazy to write a parser. Code is found in the CVS (scroll down for url): http://vhdl-lut-gen.cvs.sourceforge.net/*checkout*/vhdl-lut-gen/vhdl-lut-gen/vhdl-lut-gen.cpp

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Additional Project Details

Programming Language

C++, VHDL/Verilog

Registered

2008-01-21
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