VeriWell Verilog Simulator

4.7 Stars (3)
35 Downloads (This Week)
Last Update:
Download veriwell-2.8.7.tar.gz
Browse All Files

Description

VeriWell is a full Verilog simulator. It supports nearly all of the IEEE1364-1995 standard, as well as PLI 1.0. Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in the mid-1990 and was included with the Thomas and Moorby book

VeriWell Verilog Simulator Web Site

Update Notifications





User Ratings

★★★★★
★★★★
★★★
★★
2
1
0
0
0
ease 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 5 / 5
features 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 3 / 5
design 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 4 / 5
support 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5 3 / 5
Write a Review

User Reviews

  • simulationc
    1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    small & quick, very well ! but it does NOT support v2001 and there are some bugs. I fixed a little and forked it to "bitbucket.org/Simuc/veriwell/".

    Posted 01/29/2014
  • kalebwood
    1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    veriwell works perfectly.

    Posted 12/18/2012
  • elliotmartinez
    1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    simple and straight forward to use

    Posted 10/26/2012
Read more reviews

Additional Project Details

Intended Audience

Developers

Programming Language

VHDL/Verilog

Registered

2005-09-09
Screenshots can attract more users to your project.
Features can attract more users to your project.

Icons must be PNG, GIF, or JPEG and less than 1 MiB in size. They will be displayed as 48x48 images.