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SVEditor is an Eclipse-based editor for SystemVerilog and Verilog files. It features syntax coloring, structure display, and content assist


http://sveditor.sourceforge.net





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Release Date:

2009-03-16

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Registered:

2008-06-09

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  • Code committed

    mballance committed revision 66 to the sveditor SVN repository, changing 12 files

    posted by mballance 11 days ago

  • Code committed

    mballance committed revision 65 to the sveditor SVN repository, changing 41 files

    posted by mballance 15 days ago

  • Code committed

    committed revision 64 to the sveditor SVN repository, changing 52 files

    posted by mballance 33 days ago

  • Code committed

    mballance committed revision 63 to the SVEditor SVN repository, changing 15 files

    posted by mballance 75 days ago

  • Code committed

    mballance committed revision 62 to the SVEditor SVN repository, changing 3 files

    posted by mballance 91 days ago

  • Code committed

    mballance committed revision 61 to the SVEditor SVN repository, changing 54 files

    posted by mballance 95 days ago

  • Code committed

    mballance committed revision 60 to the SVEditor SVN repository, changing 85 files

    posted by mballance 162 days ago

  • File released: /sveditor/0.0.6/sveditor-src-0.0.6.zip

    posted 274 days ago

  • File released: /sveditor/0.0.6/sveditor-0.0.6.zip

    posted 274 days ago

  • SVEditor 0.0.6 Release

    The sixth release of SVEditor is an incremental-feature and bugfix release that, nonetheless, introduces some interesting new features. - Add support for 'open declaration' on included file - Re-add support for includes and macro definitions in the editor outline - Add support for open-declaration on a macro call - Add beginnings of 'Override/Implement Methods' action to the editor context menu - Prompts the user for tasks/functions in the super class hierarchy that can be overridden - Inserts task/function outlines - [Development] Add an extension point that allows SystemVerilog libraries to be packaged in a plug-in - Begin adding support for core SystemVerilog classes (string for now) - Add OVM 2.0.1 to as a built-in library - Fix DR 2683568 -- scanner problem when parsing incomplete begin-end block - Add basic support for DPI tasks/functions in the scanner - Fixed a problem with content assist on task/function parameter names - Added an icon for local variables and task parameters

    posted by mballance 274 days ago

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