Be the first to post a text review of skol. Rate and review a project by clicking thumbs up or thumbs down in the right column.

• skol skol_v0.4.0_rev226 file released: skol_v0.4.0_rev226.zip

  SKL Changelog skol_v0.4.0 * Resolution can be changed (152,152*5 152*10 DataPoints). A maximum Resolution of 1k5 Samples is implemented now(limited by FPGA Size) * Trigger can be turned on and off on the fly * X & Y Axis Offset adjustable in Controller for each Channel * Added Linux Starter for Controller * Optimized Controller Speed with a Profiler. The Bottleneck is the Serial Port itself, and on there the RXTX Library is the slow part. (Allows only a max of 50 Percent of the LineSpeed.) o linespeed : 115200 bits per seconds = about 14 kBytes per Second o 7 byte Datapackage Roundtrip 1000 times test : Effective Speed : 7 kBytes per Second o 158 bytes Datapackage Roundtrip 100 times test : Effective Speed : 5,8 kBytes per Second o 1526 bytes Datapackage Roundtrip 100 times test : Effective Speed : 5,77 kBytes per Second o The next Tests included Message parsing, dispatching, calculating and displaying (the normal workflow) o Very Surprising - there were really no real differences to the Roundtrip tests. So the Java Impl itself is not that slow for this Application with this connectiontype. o ( k means 1000 here ) * Reset Command resets now all values to default values. * OpCodes changed * CycleCounter for SingleAdcOperation implemented, can be used to calc this for attaching a serial interfaced adc from now on. * Version Information is printed on startup of the Controller. skol_v0.3.1 * Fixed OsciDummy skol_v0.2.2 * Added Fpga Bit File Installer Batch File (Folder build/FPGA). So the FPGA can be programmed without opening ISE * TimeDivider Functionality is now avaiable for all DataAquisition Methods * Settings will be tested after sending to Device skol_v0.2.1 * Controller: Added FileReader and FileWriter * Controller: Removed polled reading of serial port. Reduces CPU Usage. * Controller: Data Processing is now ThreadSafe and faster: 33 Hz (max DataFrameRate from FPGA: 44Hz) skol_v0.2.0 * Changed FlowCounter to MagicByte to determine correct MessageStart. * + Trigger at PosEdge or NegEdge Function * + Single DataAquisition - one Voltage Value * + Time per Div Function * skol_v0.1.0 initial release

  posted 336 days ago

• File released: /skol/skol_v0.4.0_rev226/skol_v0.4.0_rev226.zip

  posted 336 days ago

• skol skol_v0.3.1_rev179.zip file released: skol_v0.3.1_rev179.zip

  SKL Changelog skol_v0.3.1 * Fixed OsciDummy skol_v0.2.2 * Added Fpga Bit File Installer Batch File (Folder build/FPGA). So the FPGA can be programmed without opening ISE * TimeDivider Functionality is now avaiable for all DataAquisition Methods * Settings will be tested after sending to Device skol_v0.2.1 * Controller: Added FileReader and FileWriter * Controller: Removed polled reading of serial port. Reduces CPU Usage. * Controller: Data Processing is now ThreadSafe and faster: 33 Hz (max DataFrameRate from FPGA: 44Hz) skol_v0.2.0 * Changed FlowCounter to MagicByte to determine correct MessageStart. * + Trigger at PosEdge or NegEdge Function * + Single DataAquisition - one Voltage Value * + Time per Div Function * skol_v0.1.0 initial release

  posted 342 days ago

• File released: /skol/skol_v0.3.1_rev179.zip/skol_v0.3.1_rev179.zip

  posted 342 days ago

• skol skol_v0.3.0_rev174.zip file released: skol_v0.3.0_rev174.zip.zip

  SKL Changelog skol_v0.3.0 * Added Undersampling Warning * Both Channels working (Oscilloscope Mode and Measure Voltage Value) * XML DefaultComPort, Configurable TimePerDiv Settings(for Developers) skol_v0.2.2 * Added Fpga Bit File Installer Batch File (Folder build/FPGA). So the FPGA can be programmed without opening ISE * TimeDivider Functionality is now avaiable for all DataAquisition Methods * Settings will be tested after sending to Device skol_v0.2.1 * Controller: Added FileReader and FileWriter * Controller: Removed polled reading of serial port. Reduces CPU Usage. * Controller: Data Processing is now ThreadSafe and faster: 33 Hz (max DataFrameRate from FPGA: 44Hz) skol_v0.2.0 * Changed FlowCounter to MagicByte to determine correct MessageStart. * + Trigger at PosEdge or NegEdge Function * + Single DataAquisition - one Voltage Value * + Time per Div Function * skol_v0.1.0 initial release

  posted 343 days ago

• File released: /skol/skol_v0.3.0_rev174.zip/skol_v0.3.0_rev174.zip.zip

  posted 343 days ago

• skol skol_v0.2.2_rev115.zip file released: skol_v0.2.2_rev115.zip

  skol_v0.2.2 * Added Fpga Bit File Installer Batch File (Folder build/FPGA). So the FPGA can be programmed without opening ISE * TimeDivider Functionality is now avaiable for all DataAquisition Methods * skol_v0.2.1 * Controller: Added FileReader and FileWriter * Controller: Removed polled reading of serial port. Reduces CPU Usage. * Controller: Data Processing is now ThreadSafe and faster: 33 Hz (max DataFrameRate from FPGA: 44Hz) skol_v0.2.0 * Changed FlowCounter to MagicByte to determine correct MessageStart. * + Trigger at PosEdge or NegEdge Function * + Single DataAquisition - one Voltage Value * + Time per Div Function * skol_v0.1.0 initial release

  posted 359 days ago

• File released: /skol/skol_v0.2.2_rev115.zip/skol_v0.2.2_rev115.zip

  posted 359 days ago

• old Vhdl Examples hdl_v0.1.0_rev19 file released: hdl_v0.1.0_rev19.zip

  initial

  posted 363 days ago

• File released: /old Vhdl Examples/hdl_v0.1.0_rev19/hdl_v0.1.0_rev19.zip

  posted 363 days ago