by unknown1570
The SBus is a family of high-speed packet-based databus standards, suitable for both networking and interdevice communication. They are optimized for high data density transactions. This project creates and documents the standards, schematics, and driver
Changed Verilog netlists to autogenerated VHDL, and added README files
Made a few fixes and clarifications.
Fixed the pin number labels on the ATMEGAs.
Fixed the pin number labels on the ATMEGAs.
First version.
No changes.
The schematics for the SBus32 core have been released. Release 1 contains a fix to the schematics, plus a different page layout for easier reading of the postscript file. The SBus32 is a high-speed network device standard that used a 68-pin SCSI-III ...
Noticed that the multiplexers weren't connected properly to the micros, so I fixed that using buffers. Also, saved the .ps in portrait layout, so as to make it easier to read.
Noticed that the multiplexers weren't connected properly to the micros, so I fixed that using buffers. Also, saved the .ps in portrait layout, so as to make it easier to read.
First version.
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