Notepad++ Verilog Plugin

Verilog plugin for Notepad++

Add a Review
5 Downloads (This Week)
Last Update:
Download nppVerilog_v1.2.1.zip
Browse All Files

Description

Verilog processor for Notepad++. Current features:

- Instantiate a module
- Insert registers/wires from a module
- Generate a test bench template
- Automatically inserts a default header for a test bench
- Insert a clocked always block

v1.2.0 now supports ANSI and non-ANSI module declarations.

To use this plugin, select the module declaration (including parameter and I/O definitions below for non-ANSI) and click SHIFT-CTRL-C. This selects the module and parses its components. After this, all other functions are available.

Notepad++ Verilog Plugin Web Site

Update Notifications





Write a Review

User Reviews

Be the first to post a review of Notepad++ Verilog Plugin!

Additional Project Details

Intended Audience

Engineering

Programming Language

VHDL/Verilog

Registered

2014-07-18
Screenshots can attract more users to your project.
Features can attract more users to your project.

Icons must be PNG, GIF, or JPEG and less than 1 MiB in size. They will be displayed as 48x48 images.