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Description

A behavioral and RTL model of RISC-based 32/64 bit CPU written in C++ with the help of SystemC library. The model is a part of a test bench model which can be compiled and used as an emulator.

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Additional Project Details

Languages

English

Intended Audience

Developers, Information Technology

User Interface

Console/Terminal

Programming Language

C++

Registered

2006-06-12
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