FSMDesigner
FSMDesigner4 is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
http://ra.ziti.uni-heidelberg.de/index.php?page=projects&id=fsmdes4
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Forum thread added
batfink_sf created the No Package 'Qt..." found forum thread
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fsmdesigner4 fsmdesigner4-1.2 file released: FSMDesigner4-1.2.tar.gz
Implemented SVG export, printing should work, improved state mnenonic map (include color), implement mnenonic maps for complete projects, and several small bugfixes. Additionally, version 1.2 adds System Verilog Assertions as an option for the HDL output ...
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FSMDesigner version 1.2 released
Version 1.2 was released today. This version improves several parts and introduces some new features. The main new features are .svg export and System Verilog Assertions (SVA) support for verification. Using this feature it is possible for example to ...
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fsmdesigner4 FSMDesigner4-1.1 file released: FSMDesigner4-1.1.tar.gz
* more intuitive property editing * fixed many build-related problems * building tested on OpenSuSE 10.2 & 10.3 * need more testers...
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FSMDesigner4 Version 1.1 released
Version 1.1 was released today. This version incorporates many build related improvements as well as more intuitive property editing. The configure script now actually tests for required librariess and programs; the property widget immediately updates ...
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Subversion & Wiki are online
The FSMDesigner subversion respository has moved from our own servers to sourceforge.net. Also, the wiki is online. Currenlty installation and open tasks are documented. We hope to add more soon.
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fsmdesigner4 FSMDesigner4-1.0 file released: FSMDesigner4-1.0.tar.gz
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FSMDesigner SourceForge Project started
The FSMDesigner project is going open-source and is pleased to announce the start of an SourceForge Project to facilitate access to the project.
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