Dirac

Hi,

In the software, when you perform the downsampling (or the upsampling), you keep 4 extra bits of information after each step (see StageI_* in downconvert.h). Ending with values on 18 bits for the 1:8 data.

Mainly because of bandwidth constraints with the RAM blocks on the FPGA, I would like to keep the pixel values on 8 bits -- e.g. removing the least significant bits. What kind of influence do you think it would have? Do you think it would be tolerable?


Would you mind if I use the name Dirac_HW for the hardware implementation? At least, this is a suggestion as to how naming it (since you're working on that at the BBC too).

Best,

/er.