From: SourceForge.net <no...@so...> - 2009-05-17 10:35:46
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Bugs item #2791782, was opened at 2009-05-14 17:50 Message generated for change (Comment added) made by maartenbrock You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=100599&aid=2791782&group_id=599 Please note that this message will contain a full copy of the comment thread, including the initial issue submission, for this request, not just the latest update. Category: C-Front End >Group: fixed >Status: Closed >Resolution: Fixed Priority: 5 Private: No Submitted By: Art (armctec) Assigned to: Maarten Brock (maartenbrock) Summary: Warning 147 in the new version 2.9.0 Initial Comment: the code compiler ok in the version SDCC : mcs51/gbz80/z80/avr/ds390/pic16/pic14/TININative/xa51/ds400/hc08 2.8.0 #5117 (Mar 23 2008) (MINGW32) ------------------------------------------------> ------------------------------------------------> typedef struct { unsigned char p:1; unsigned char x:5; unsigned char y:2; unsigned char *men; }MENSAGEM; __code MENSAGEM saudacao={1,3,0,"TECNOLOGIA"}; __code MENSAGEM saudacao2={{1,2,0,"LINHA 1"}, {0,3,0,"NOVLINHA 2"}}; ------------------------------------------------> ------------------------------------------------> ;-------------------------------------------------------- ; File Created by SDCC : free open source ANSI-C Compiler ; Version 2.8.0 #5117 (Mar 23 2008) (MINGW32) ; This file was generated Thu May 14 12:47:54 2009 ;-------------------------------------------------------- .module teste .optsdcc -mmcs51 --model-small ;-------------------------------------------------------- ; Public variables in this module ;-------------------------------------------------------- .globl _saudacao2 .globl _saudacao ;-------------------------------------------------------- ; special function registers ;-------------------------------------------------------- .area RSEG (DATA) ;-------------------------------------------------------- ; special function bits ;-------------------------------------------------------- .area RSEG (DATA) ;-------------------------------------------------------- ; overlayable register banks ;-------------------------------------------------------- .area REG_BANK_0 (REL,OVR,DATA) .ds 8 ;-------------------------------------------------------- ; internal ram data ;-------------------------------------------------------- .area DSEG (DATA) ;-------------------------------------------------------- ; overlayable items in internal ram ;-------------------------------------------------------- .area OSEG (OVR,DATA) ;-------------------------------------------------------- ; indirectly addressable internal ram data ;-------------------------------------------------------- .area ISEG (DATA) ;-------------------------------------------------------- ; absolute internal ram data ;-------------------------------------------------------- .area IABS (ABS,DATA) .area IABS (ABS,DATA) ;-------------------------------------------------------- ; bit data ;-------------------------------------------------------- .area BSEG (BIT) ;-------------------------------------------------------- ; paged external ram data ;-------------------------------------------------------- .area PSEG (PAG,XDATA) ;-------------------------------------------------------- ; external ram data ;-------------------------------------------------------- .area XSEG (XDATA) ;-------------------------------------------------------- ; absolute external ram data ;-------------------------------------------------------- .area XABS (ABS,XDATA) ;-------------------------------------------------------- ; external initialized ram data ;-------------------------------------------------------- .area XISEG (XDATA) .area HOME (CODE) .area GSINIT0 (CODE) .area GSINIT1 (CODE) .area GSINIT2 (CODE) .area GSINIT3 (CODE) .area GSINIT4 (CODE) .area GSINIT5 (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area CSEG (CODE) ;-------------------------------------------------------- ; global & static initialisations ;-------------------------------------------------------- .area HOME (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area GSINIT (CODE) ;-------------------------------------------------------- ; Home ;-------------------------------------------------------- .area HOME (CODE) .area HOME (CODE) ;-------------------------------------------------------- ; code ;-------------------------------------------------------- .area CSEG (CODE) .area CSEG (CODE) .area CONST (CODE) _saudacao: .db 0x07 .byte _str_0,(_str_0 >> 8),#0x80 _saudacao2: .db 0x05 .byte _str_1,(_str_1 >> 8),#0x80 .db 0x06 .byte _str_2,(_str_2 >> 8),#0x80 _str_0: .ascii "TECNOLOGIA" .db 0x00 _str_1: .ascii "LINHA 1" .db 0x00 _str_2: .ascii "NOVLINHA 2" .db 0x00 .area XINIT (CODE) .area CABS (ABS,CODE) ------------------------------------------------> ------------------------------------------------> but in the new version 2.9.0 no work and display a warning 147 ---------------------------------------------------------------------- >Comment By: Maarten Brock (maartenbrock) Date: 2009-05-17 12:35 Message: Fixed in SDCC 2.9.1 #5457. ---------------------------------------------------------------------- Comment By: Maarten Brock (maartenbrock) Date: 2009-05-16 15:25 Message: >From the OP via email: Okay, sorry for typing is the correct: ------------------------------------------------------ typedef struct { unsigned char p:1; unsigned char x:5; unsigned char y:2; const char *men; }MENSAGEM; __code MENSAGEM saudacao={1,3,0,"TECNOLOGIA"}; __code MENSAGEM saudacao2[]={{1,2,0,"LINHA 1"}, {0,3,0,"NOVLINHA 2"}}; void main() { } ------------------------------------------------------ In version 2.9.0 the output: >>> "E:\Programacao\SDCC\bin\sdcc.exe" "Teste.c" >>> Teste.c:9: warning 147: excess elements in struct initializer after 'saudacao' >>> Teste.c:11: warning 147: excess elements in struct initializer after 'saudacao2' >>> Teste.c:11: warning 147: excess elements in struct initializer after 'saudacao2' 1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 2.9.0 #5416 (Mar 22 2009) (MINGW32) 4 ; This file was generated Fri May 15 20:31:21 2009 5 ;-------------------------------------------------------- 6 .module Teste 7 .optsdcc -mmcs51 -- model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _saudacao2 13 .globl _saudacao 14 .globl _main 15 ;-------------------------------------------------------- 16 ; special function registers 17 ;-------------------------------------------------------- 18 .area RSEG (DATA) 19 ;-------------------------------------------------------- 20 ; special function bits 21 ;-------------------------------------------------------- 22 .area RSEG (DATA) 23 ;-------------------------------------------------------- 24 ; overlayable register banks 25 ;-------------------------------------------------------- 26 .area REG_BANK_0 (REL,OVR,DATA) 0000 27 .ds 8 28 ;-------------------------------------------------------- 29 ; internal ram data 30 ;-------------------------------------------------------- 31 .area DSEG (DATA) 32 ;-------------------------------------------------------- 33 ; overlayable items in internal ram 34 ;-------------------------------------------------------- 35 .area OSEG (OVR,DATA) 36 ;-------------------------------------------------------- 37 ; Stack segment in internal ram 38 ;-------------------------------------------------------- 39 .area SSEG (DATA) 0000 40 __start__stack: 0000 41 .ds 1 42 43 ;-------------------------------------------------------- 44 ; indirectly addressable internal ram data 45 ;-------------------------------------------------------- 46 .area ISEG (DATA) 47 ;-------------------------------------------------------- 48 ; absolute internal ram data 49 ;-------------------------------------------------------- 50 .area IABS (ABS,DATA) 51 .area IABS (ABS,DATA) 52 ;-------------------------------------------------------- 53 ; bit data 54 ;-------------------------------------------------------- 55 .area BSEG (BIT) 56 ;-------------------------------------------------------- 57 ; paged external ram data 58 ;-------------------------------------------------------- 59 .area PSEG (PAG,XDATA) 60 ;-------------------------------------------------------- 61 ; external ram data 62 ;-------------------------------------------------------- 63 .area XSEG (XDATA) 64 ;-------------------------------------------------------- 65 ; absolute external ram data 66 ;-------------------------------------------------------- 67 .area XABS (ABS,XDATA) 68 ;-------------------------------------------------------- 69 ; external initialized ram data 70 ;-------------------------------------------------------- 71 .area XISEG (XDATA) 72 .area HOME (CODE) 73 .area GSINIT0 (CODE) 74 .area GSINIT1 (CODE) 75 .area GSINIT2 (CODE) 76 .area GSINIT3 (CODE) 77 .area GSINIT4 (CODE) 78 .area GSINIT5 (CODE) 79 .area GSINIT (CODE) 80 .area GSFINAL (CODE) 81 .area CSEG (CODE) 82 ;-------------------------------------------------------- 83 ; interrupt vector 84 ;-------------------------------------------------------- 85 .area HOME (CODE) 0000 86 __interrupt_vect: 0000 02s00r00 87 ljmp __sdcc_gsinit_startup 88 ;-------------------------------------------------------- 89 ; global & static initialisations 90 ;-------------------------------------------------------- 91 .area HOME (CODE) 92 .area GSINIT (CODE) 93 .area GSFINAL (CODE) 94 .area GSINIT (CODE) 95 .globl __sdcc_gsinit_startup 96 .globl __sdcc_program_startup 97 .globl __start__stack 98 .globl __mcs51_genXINIT 99 .globl __mcs51_genXRAMCLEAR 100 .globl __mcs51_genRAMCLEAR 101 .area GSFINAL (CODE) 0000 02s00r03 102 ljmp __sdcc_program_startup 103 ;-------------------------------------------------------- 104 ; Home 105 ;-------------------------------------------------------- 106 .area HOME (CODE) 107 .area HOME (CODE) 0003 108 __sdcc_program_startup: 0003 12s00r00 109 lcall _main 110 ; return from main will lock up 0006 80 FE 111 sjmp . 112 ;-------------------------------------------------------- 113 ; code 114 ;-------------------------------------------------------- 115 .area CSEG (CODE) 116 ;------------------------------------------------------------ 117 ;Allocation info for local variables in function 'main' 118 ;------------------------------------------------------------ 119 ;------------------------------------------------------------ 120 ; Teste.c:14: void main() 121 ; ----------------------------------------- 122 ; function main 123 ; ----------------------------------------- 0000 124 _main: 0002 125 ar2 = 0x02 0003 126 ar3 = 0x03 0004 127 ar4 = 0x04 0005 128 ar5 = 0x05 0006 129 ar6 = 0x06 0007 130 ar7 = 0x07 0000 131 ar0 = 0x00 0001 132 ar1 = 0x01 133 ; Teste.c:17: } 0000 22 134 ret 135 .area CSEG (CODE) 136 .area CONST (CODE) 0000 137 _saudacao: 0000 07 138 .db 0x07 0001 139 _saudacao2: 0001 05 140 .db 0x05 0002 06 141 .db 0x06 142 .area XINIT (CODE) 143 .area CABS (ABS,CODE) ---------------------------------------------------------- In version 2.8.0 the output: 1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 2.8.0 #5117 (Mar 23 2008) (MINGW32) 4 ; This file was generated Fri May 15 20:33:47 2009 5 ;-------------------------------------------------------- 6 .module Teste 7 .optsdcc -mmcs51 -- model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _saudacao2 13 .globl _saudacao 14 .globl _main 15 ;-------------------------------------------------------- 16 ; special function registers 17 ;-------------------------------------------------------- 18 .area RSEG (DATA) 19 ;-------------------------------------------------------- 20 ; special function bits 21 ;-------------------------------------------------------- 22 .area RSEG (DATA) 23 ;-------------------------------------------------------- 24 ; overlayable register banks 25 ;-------------------------------------------------------- 26 .area REG_BANK_0 (REL,OVR,DATA) 0000 27 .ds 8 28 ;-------------------------------------------------------- 29 ; internal ram data 30 ;-------------------------------------------------------- 31 .area DSEG (DATA) 32 ;-------------------------------------------------------- 33 ; overlayable items in internal ram 34 ;-------------------------------------------------------- 35 .area OSEG (OVR,DATA) 36 ;-------------------------------------------------------- 37 ; Stack segment in internal ram 38 ;-------------------------------------------------------- 39 .area SSEG (DATA) 0000 40 __start__stack: 0000 41 .ds 1 42 43 ;-------------------------------------------------------- 44 ; indirectly addressable internal ram data 45 ;-------------------------------------------------------- 46 .area ISEG (DATA) 47 ;-------------------------------------------------------- 48 ; absolute internal ram data 49 ;-------------------------------------------------------- 50 .area IABS (ABS,DATA) 51 .area IABS (ABS,DATA) 52 ;-------------------------------------------------------- 53 ; bit data 54 ;-------------------------------------------------------- 55 .area BSEG (BIT) 56 ;-------------------------------------------------------- 57 ; paged external ram data 58 ;-------------------------------------------------------- 59 .area PSEG (PAG,XDATA) 60 ;-------------------------------------------------------- 61 ; external ram data 62 ;-------------------------------------------------------- 63 .area XSEG (XDATA) 64 ;-------------------------------------------------------- 65 ; absolute external ram data 66 ;-------------------------------------------------------- 67 .area XABS (ABS,XDATA) 68 ;-------------------------------------------------------- 69 ; external initialized ram data 70 ;-------------------------------------------------------- 71 .area XISEG (XDATA) 72 .area HOME (CODE) 73 .area GSINIT0 (CODE) 74 .area GSINIT1 (CODE) 75 .area GSINIT2 (CODE) 76 .area GSINIT3 (CODE) 77 .area GSINIT4 (CODE) 78 .area GSINIT5 (CODE) 79 .area GSINIT (CODE) 80 .area GSFINAL (CODE) 81 .area CSEG (CODE) 82 ;-------------------------------------------------------- 83 ; interrupt vector 84 ;-------------------------------------------------------- 85 .area HOME (CODE) 0000 86 __interrupt_vect: 0000 02s00r00 87 ljmp __sdcc_gsinit_startup 88 ;-------------------------------------------------------- 89 ; global & static initialisations 90 ;-------------------------------------------------------- 91 .area HOME (CODE) 92 .area GSINIT (CODE) 93 .area GSFINAL (CODE) 94 .area GSINIT (CODE) 95 .globl __sdcc_gsinit_startup 96 .globl __sdcc_program_startup 97 .globl __start__stack 98 .globl __mcs51_genXINIT 99 .globl __mcs51_genXRAMCLEAR 100 .globl __mcs51_genRAMCLEAR 101 .area GSFINAL (CODE) 0000 02s00r03 102 ljmp __sdcc_program_startup 103 ;-------------------------------------------------------- 104 ; Home 105 ;-------------------------------------------------------- 106 .area HOME (CODE) 107 .area HOME (CODE) 0003 108 __sdcc_program_startup: 0003 12s00r00 109 lcall _main 110 ; return from main will lock up 0006 80 FE 111 sjmp . 112 ;-------------------------------------------------------- 113 ; code 114 ;-------------------------------------------------------- 115 .area CSEG (CODE) 116 ;------------------------------------------------------------ 117 ;Allocation info for local variables in function 'main' 118 ;------------------------------------------------------------ 119 ;------------------------------------------------------------ 120 ; Teste.c:14: void main() 121 ; ----------------------------------------- 122 ; function main 123 ; ----------------------------------------- 0000 124 _main: 0002 125 ar2 = 0x02 0003 126 ar3 = 0x03 0004 127 ar4 = 0x04 0005 128 ar5 = 0x05 0006 129 ar6 = 0x06 0007 130 ar7 = 0x07 0000 131 ar0 = 0x00 0001 132 ar1 = 0x01 133 ; Teste.c:17: } 0000 22 134 ret 135 .area CSEG (CODE) 136 .area CONST (CODE) 0000 137 _saudacao: 0000 07 138 .db 0x07 0001r0Cs00 80 139 .byte _str_0, (_str_0 >> 8),#0x80 0004 140 _saudacao2: 0004 05 141 .db 0x05 0005r17s00 80 142 .byte _str_1, (_str_1 >> 8),#0x80 0008 06 143 .db 0x06 0009r1Fs00 80 144 .byte _str_2, (_str_2 >> 8),#0x80 000C 145 _str_0: 000C 54 45 43 4E 4F 4C 146 .ascii "TECNOLOGIA" 4F 47 49 41 0016 00 147 .db 0x00 0017 148 _str_1: 0017 4C 49 4E 48 41 20 149 .ascii "LINHA 1" 31 001E 00 150 .db 0x00 001F 151 _str_2: 001F 4E 4F 56 4C 49 4E 152 .ascii "NOVLINHA 2" 48 41 20 32 0029 00 153 .db 0x00 154 .area XINIT (CODE) 155 .area CABS (ABS,CODE) ---------------------------------------------------------------------- Comment By: Maarten Brock (maartenbrock) Date: 2009-05-15 09:48 Message: __code MENSAGEM saudacao2 = { {1,2,0,"LINHA 1"}, {0,3,0,"NOVLINHA 2"} }; To me this looks like incorrect code and the warning about excess initializers is valid. Your saudacao2 is not an array of structs but just a single struct variable. ---------------------------------------------------------------------- You can respond by visiting: https://sourceforge.net/tracker/?func=detail&atid=100599&aid=2791782&group_id=599 |