[Sdcc-user] Accessing Cygnal C8051F12* code and SFR banks

[Mark S. <mar...@ch...>]

I am beginning work on a new project that uses a Cygnal C8051F124 mcu.

This chip is positively loaded with features, in fact the normal SFR 
address space was insufficient for them all.  To work around this 
limitation, SFRs are assigned accross 4 different pages, which must be 
selected before an SFR can be accessed.  Since this is not a normal 
8051 feature I expect that I will have to handle switching between 
pages myself, and just define SFR locations as normal.  Should I 
anticipate any problems with this approach?

Code memory is also banked in a similar fashion.    0x0000 to 0x7FFF is 
always mapped to Bank 0.  Based on the value of the PSBANK register, 
0x8000 - 0xFFFF will be mapped to any of Banks 0-3.  I hope this can be 
handled by smart manipulation of the linker.  Anyone have any ideas how 
to work with this feature?

TIA,

Mark Swayne