But AVR is Harvard architecture and it has a gcc port.

Regards,
Diego


On Tue, Nov 5, 2013 at 1:50 PM, Sebastien Lorquet <sebastien@lorquet.fr> wrote:
Hello,

My understanding was not the accumulator architecture, but the bus architecture.

gcc seems to target a majority of Von Neumann CPUs (with a shared data/code
space), while SDCC is able to deal with Harvard CPUs with separate data/code
address space (MCS51, PIC, etc)

Best regards

Sébastien Lorquet

Le 05/11/2013 12:58, Valentin Dudouyt a écrit :
> Hi,
>
> I guess that's because GCC is not internally good for microcontrollers -
> especially those that using a so-called 'accumulator architecture'.
>
> On 05.11.2013 18:55, Diego Herranz wrote:
>> Hi!
>>
>> I just wanted to ask a philosophical question.
>>
>> For AVR microcontrollers there is avr-gcc which takes advantage of the huge
>> amount of work spent in the development of GCC.
>>
>> Why the micros targeted by SDCC don't have a gcc port? Why there is no pic-gcc
>> port? Or 8051, etc? Is it a technical/architecture problem? Licenses problem?
>>
>> I've always thought that there must be something blocking those gcc ports but
>> I don't know what it is.
>>
>> Thanks a lot!
>>
>>
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from the latest Intel processors and coprocessors. See abstracts and register
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