The project folder that I have so far is in http://www.mediafire.com/?c1444jbnizc b/c the message would get otherwise too large to be posted. What I'm trying to do right now is get the a/d conversion module working, and see the output on a combination of LEDs, through USART to the computer on terminal or something, through looking at the PWM variation or outputting to a LCD display. I'm following the guidelines as described in section 19 of the PIC18F2620 manual. I have some questions about the code below:

1. For ADCON2, I have picked the minimum acquisition time and the fastest clock, which is Fosc/4. Would anyone know about the implications, pros and cons of picking different acquisition time and a/d clock source?

2. For the a/d input acquisition time, I have a delay loop that involves using a while loop that has a delay of 27 us rather than the minimum time suggested in section 19.1 of 2.4 us. Could there be any implications of doing what I did in my code?

3. For using the a/d interrupt functionality, I infer that I would write an ISR that is dependent on ADIF interrupt flag bit. I'm not sure where I can find the interrupt number for a/d interrupt as I would need it to complete my ISR properly. Can anyone help me on this? I was having trouble finding it in the SDCC manual.

4. Maybe be a bit of a silly question. I'm planning to add up the high and low result bits into a single result integer and return it to the function calling the a/d sampling function. What would be the limit for how large an integer type can be?

Thanks,

Stanley