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SDCC 2.8.0 and CC1110F32

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2009-03-08
2013-03-12
  • Ronald Marcus
    Ronald Marcus
    2009-03-08

    This message is for anyone who has worked with the CC1110 and successfully put it into PM2.
       I've been using SDCC with the TI CC1110F32 with great success. There seems to be an issue with the timing of putting the CC1110 into sleep power mode2. From TI's info the power mode change request has to be aligned with the positive edge of the LF internal clock. I have tried all of the techniques offered by TI, but can not get the chip into the PM2 mode with .5uA of current drain. The drain seems to hover around 150uA, and what is worse, after the sleep timer interrupt, the chip resets from the beginning. I am thinking it is one of three things...
    1. This chip is bad.
    2. Maybe something in the compile options differs enough to throw off the timing.
    3. My code is flawed.

    1. I can't tell you how many times I have changed out a processor, only to find the problem elsewhere.
    2. Everything else works as expected on the chip, but I remember that SDCC may add some extra code in the hex file.
    3. I copied the TI and Errata code verbatim, and also changed it to adjust for differences between Keil and SDCC.
    Please, any help would be greatly appreciated.
    Ron