Learn how easy it is to sync an existing GitHub or Google Code repo to a SourceForge project! See Demo

Close

#806 Fix bit conditional bug caused by LFSR removal

closed-fixed
5
2013-05-25
2004-09-02
Aaron Colwell
No

The following code

#include "pic18fregs.h"

unsigned char tmp = 0;

void main()
{
if (PIE1bits.TXIE)
{
tmp++;
}

tmp += 4;
}

when compiled with

sdcc -mpic16 -ppic18f242 a.c

no longer generates the LFSR instruction, but it still
generates an instruction that uses INDF0 instead of the
actual SFR.

The following change seems to fix the problem. I based
this fix off of similar changes that were made when
the extra LFSR instructions were removed.

Index: pic16/gen.c

=========================
RCS file: /cvsroot/sdcc/sdcc/src/pic16/gen.c,v
retrieving revision 1.44
diff -u -r1.44 gen.c
--- pic16/gen.c 1 Sep 2004 10:14:17 -0000 1.44
+++ pic16/gen.c 2 Sep 2004 04:16:07 -0000
@@ -9196,6 +9196,8 @@
/* read the first byte */
switch (ptype) {
case POINTER:
+ pic16_emitpcode(POC_MOVFW,
pic16_popGet(AOP(left), 0));
+ break;
case IPOINTER:
case PPOINTER:
case FPOINTER:

Discussion

  • Aaron Colwell
    Aaron Colwell
    2004-09-02

    • summary: Fix bit conditional bug caused by LFSR removal fix --> Fix bit conditional bug caused by LFSR removal
     
  • Vangelis Rokas
    Vangelis Rokas
    2004-09-13

    Logged In: YES
    user_id=770505

    Bug fixed in SDCC version 2.4.4 #837 .
    The bit issue raised initially with inefficient bit
    read is not yet complete, but produces valid code.

     
  • Vangelis Rokas
    Vangelis Rokas
    2004-09-13

    • milestone: --> fixed
    • assigned_to: nobody --> vrokas
    • status: open --> closed-fixed
     
  • Raphael Neider
    Raphael Neider
    2004-09-13

    Logged In: YES
    user_id=1115835

    This bug reoccurs in SDCC : pic16 2.4.4 #838 (Sep 13 2004)
    (UNIX); code from above fails again.

     
  • Vangelis Rokas
    Vangelis Rokas
    2004-09-13

    Logged In: YES
    user_id=770505

    Fixed in v. 2.4.4. #839