Since we're discussing the optimization of arithmetics modulo powers
of two smaller than the size of a word, may I remark that the
"optimal" representation that assembly programmers often use is to
represent numbers using the *high* bits in a word rather than the low
ones, since overflow then happens implicitly. Multiplication requires
some shifting, but nothing worse than with fixnums. Of course, such
representation is only worth it if you don't convert to and from the
canonical representation at every operation.
Implementing such an optimization in a systematic way is probably
overkill for SBCL, but since we were discussing numbers modulo (ash 1
29) and such, I thought I might offer these 2 mg of gold.
NB: on architectures where carry propagation takes more cycles than
barrel shifting, I've seen small integers implemented as bit patterns
being shifted. Makes for fast increment, decrement, min and max,
though slow addition. I don't propose this as an optimization in SBCL,
though it could conceivably free an adder pipeline in heavy integer
crunching.
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