[Sbcl-commits] CVS: sbcl/src/runtime ppc-arch.c,1.35,1.36

[Alastair B. <lis...@us...>]

Update of /cvsroot/sbcl/sbcl/src/runtime
In directory sfp-cvsdas-3.v30.ch3.sourceforge.com:/tmp/cvs-serv28980/src/runtime

Modified Files:
	ppc-arch.c 
Log Message:
1.0.41.40: ppc: Shorten the gencgc allocation sequence.

  * Rearrange the allocation sequence to avoid all branches,
relying on the runtime to manipulate the point at which
execution resumes from an allocation trap to compensate.

  * Update the runtime to match the new allocation sequence.

  * There is a further possible optimization here: The runtime
allocation trap handler can also accept an ADDI instruction
where the current sequence uses an ADD.  In the case of a
fixed allocation size, this would save loading the temp
register with the size.

  * Another optimization, along the same lines as the previous
one: With a fixed allocation size, adjusting the pointer to
point to the beginning of the data block and setting the lowtag
could be done in a single instruction.

  * A third optimization, one which would entail modifying the
allocation trap handler slightly, and depends on at least the
first optimization above being in place: Once temp-tn is no
longer being used to hold the allocation size for fixed
allocations, it is available to hold the address of the
alloc region when threading is disabled, thus saving having to
reload it (two instructions).


Index: ppc-arch.c
===================================================================
RCS file: /cvsroot/sbcl/sbcl/src/runtime/ppc-arch.c,v
retrieving revision 1.35
retrieving revision 1.36
diff -u -d -r1.35 -r1.36
--- ppc-arch.c	8 Aug 2010 01:13:36 -0000	1.35
+++ ppc-arch.c	8 Aug 2010 01:14:04 -0000	1.36
@@ -300,15 +300,15 @@
         && (4 == ((inst >> 1) & 0x3ff))) {
         /*
          * We got the instruction.  Now, look back to make sure it was
-         * proceeded by what we expected.  2 instructions back should be
-         * an ADD or ADDI instruction.
+         * proceeded by what we expected.  The previous instruction
+         * should be an ADD or ADDI instruction.
          */
         unsigned int add_inst;
 
-        add_inst = pc[-3];
+        add_inst = pc[-1];
 #if 0
         fprintf(stderr, "   add inst at %p:  inst = 0x%08x\n",
-                pc - 3, add_inst);
+                pc - 1, add_inst);
 #endif
         opcode = add_inst >> 26;
         if ((opcode == 31) && (266 == ((add_inst >> 1) & 0x1ff))) {
@@ -389,7 +389,7 @@
      * is the size of the allocation.  Get it and call alloc to allocate
      * new space.
      */
-    inst = pc[-3];
+    inst = pc[-1];
     opcode = inst >> 26;
 #if 0
     fprintf(stderr, "  add inst  = 0x%08x, opcode = %d\n", inst, opcode);
@@ -491,6 +491,15 @@
         undo_fake_foreign_function_call(context);
     }
 
+    /* Skip the allocation trap and the write of the updated free
+     * pointer back to the allocation region.  This is two
+     * instructions when threading is enabled and four instructions
+     * otherwise. */
+#ifdef LISP_FEATURE_SB_THREAD
+    (*os_context_pc_addr(context)) = pc + 2;
+#else
+    (*os_context_pc_addr(context)) = pc + 4;
+#endif
 
 }
 #endif
@@ -550,7 +559,6 @@
     /* Is this an allocation trap? */
     if (allocation_trap_p(context)) {
         handle_allocation_trap(context);
-        arch_skip_instruction(context);
         return;
     }
 #endif