Class-C Power Amplifier Design

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domispace
2013-05-05
2013-05-25
  • domispace
    domispace
    2013-05-05

    Qucs version: 0.0.16

    Hello everybody!

    I am trying to design a low-power class-C power amplifier (output power =~0.5 W, working frequency 400 MHz) with a NXP's BFG520 bipolar transistor. I have done multiple transient simulations but it seems quite hard to obtain quickly a weel-designed circuit without using tools like Large-Scale S-Parameters or LSSP (since the transistor works in a very nonlinear mode)... In my schematic, the components value were chosen quite ambigously/randomly, according to boring, sometimes unsuccessful manual tunes with transient simulations, and diverse documentation as well.

    After several days of trial and bibliography research, I decided to ask for some help herein the forum, since it's the first time a try to design a class-C PA, and since I know some people could have had some experience with this class of PAs.

    Also, since no topics in this category is available in the Qucs forum topics, this one could help for future readers. Thanks you in advance for your help! :)

    So, first, how would I wish my class-C PA to be?

    • I would like to get ~400 mW (26 dBm) at the output (this is the strongest condition)
    • It would be nice to get a ~ 10 dB gain or 13 dB if this is possible (but I heard that getting a strong gain is quite difficult with this class of PAs) so that I should use a ~16 dBm power source at the input

    Here are some questions:
    - Without any tool such as LSSP, how can I optimize the input matching network (between the power source and the base)? Knowing that the transistor datasheet does not mention the input impedances.
    - Which value of coils should I use between the power line and the collector? Is there a formula or something useful? I read that a good value is : L = Z/(4*f).
    - How can I know which power will be dissipated in the transistor?

    I used an online tutorial available here : http://hem.passagen.se/communication/pa313.html to get some values for my components. But in the example, the transistor is a Motorola model and the datasheet contains quite complete informations about the input impedance, but this is not my case. And unfortunately, I was not able to get the correct output power I desired (400 mW) as well.

    Thanks for your help! And sorry if the introduction is too long for your patience. ;)

    I post my schematic and the transistor model I use. You can find them in attached files.

    In the schematic, there is a very simple circuit {voltage source + internal impedance + output impedance}. This is because I wanted to have a reference so that I could compare it with the real power available in the transistor's base.

     
    Last edit: domispace 2013-05-05
  • randyc
    randyc
    2013-05-06

    Wow, this takes me back about forty years. I'm on the road now (enroute from California to Virginia for my son's graduation) with no tools/references BUT as I recall, the output RESISTANCE of a Class C amplifier is about (Vcc - Vce sat)^2/2*Poutput. This will yield PART of the most important portion of the recipe, at least for output power.

    Input and output imaginary parts of the transistor impedance are of course capacitive. In the "old days" transistors intended for Class C operation were specified by Rin +jXin and Rout +jXout for a SPECIFIC output power level, from which the conjugate matching circuit was designed.

    I'm going to assume that the transistor model that you're using may not include package parasitics (although these may not be important at 400 MHz if the transistor is not a high-power, large-geometry structure).

    As I recall, ancient design procedure was to use lowpass filter matching at both input and output, with the final capacitive element of the filter being the -reactance of the transistor, whether input or output. However this is complicated by the desired operating bandwidth which determines the Q of the matching circuit.

    There was a Motorola applications note regarding impedance matching lowpass filters from the 1960 era. A rigorous internet search may turn it up - I THINK that there was good Class C information (but my memory is not so good, now).

    Regarding your question about decoupling inductors, a good rule of thumb is that they should be about three to five times the reactance of the REAL part of the impedance, input or output (note that the assumption is that the imaginary part has been matched). NOT the source and load impedances - the real part of the device impedances at the operating conditions !

    Beware, however, that these inductors are invitations to spurious oscillations - it is recommended to add some loss to the decoupling. A technique used long ago was to wind the decoupling inductor AROUND a 1/4 watt resistor (at 400 MHz this should be OK if the resistor is carbon - NOT wire wound or metal film).

    Your desired performance should be relatively simple to obtain IF the bandwidth is modest and if you have chosen the correct transistor (I'm not familiar with your example). I would suggest a fairly low-power device because the capacitive reactances will be substantially lower than a power transistor thus easier to match.

    Use your Smith Chart to plot the estimated input and output real impedance, rotate them by estimated shunt capacive contributions. From that point, establish starting points for the lowpass inductors. I don't know if you can use the optimizer to complete the design - I am way too new to QUCS.

    You may have to iterate manually. (Frankly, once reasonable starting values have been established for the matching circuits, it shouldn't take more than an hour to optimize these values on the bench.)

    We are too dependant on computer optimization these days. This is necassary at microwave frequencies but at UHF, empirical optimization is usually quicker in my opinion.

    Insure that your therml path is adequate to keep junction temperatures within safe limits considering the operating temperature and collector efficiency.

    The normal tuning procedure for a Class C amplifier involves adjusting the input for minimum return loss while adjusting the output circuit for maximum power. Repeat as needed.

    High power Class C amplifiers can be deceptively difficult in unexpected ways ... I recall adjusting a medium power (5 watts or so) amplifier using Johanson variable capacitors in the output circuit. The solder seal around one of the capacitors melted due to mismatch !~

    Best wishes,
    randyc

     
    • domispace
      domispace
      2013-05-10

      Hello Randyc, hello everybody!

      A great thank you for your detailed help! Your words will for sure be useful for my current and also future designs. Your message reassure me about what I have already done with the PA.

      Your are right about the desired output resistance : R = (VCC - VCEsat)^2 / (2*P_out_desired) and also concerning the famous Motorola application note, which is great. Unfortunatly Motorola does not provide transistor datasheets anymore. They were the only ones with an information about the input impedance for large signals. But again, yes, it was for a SPECIFIED power level at a specific frequency, but this could be a great help for a first try.

      Finally I have been able to get some output power from my real PA, and to design a correct input matching so that it is quite usable, but still needs to be optimized. For this, I used the available network analyzer and worked it at "large" scale power (max 10 dBm). As my own desired input power is 13 dBm, I will perform a linear interpolation to know (approximately) the S11 parameter.

      But my model used in Qucs seems very different from the real transistor's behaviour. I should still have a look at this. And in th attachd files you can see that the transistor model includes the package parasitics. ;)

      Could you explicit what you wrote about the decoupling inductors' values? "Regarding your question about decoupling inductors, a good rule of thumb is that they should be about three to five times the reactance of the REAL part of the impedance, input or output (note that the assumption is that the imaginary part has been matched). NOT the source and load impedances - the real part of the device impedances at the operating conditions !"
      Do you mean the output resistance (the one for which we gave the formula) or somthing else?

      Thank you again and congratulations for your son's graduation!

       
  • randyc
    randyc
    2013-05-11

    Hi, I'm glad to know that you're making progress. I'll illustrate the decoupling inductance values with a couple of examples.

    Example 1: A bipolar transistor operating in linear, small-signal mode requires an inductor to decouple the base from the bias network. From S-parameters, the input matching network has been designed to provide a conjugate match at the transistor base of 22 +j35.

    We assume that the reactive part of S11 is matched by +j35 so the transistor input impedance is 22 ohms real. By our rule of thumb (inductive reactance is 3 to 5 times the real part of the impedance) the minimum inductance would be 3 x 22 or +j 66 ohms at the operating frequency. (Higher is better if no spurious oscillation results.)

    Example 2: An OSCILLATOR requires similar base decoupling but the situation is complicated by the fact that the tank (resonant) circuit is also connected to the transistor base. Any reactive component common to this point is likely to shift the operating frequency, lower the Q of the tank circuit, cause a spurious oscillation or ALL THREE.

    In this example, the reactance of the decoupling inductor should be higher than the tank circuit reactance, rather than the real part of the transistor input impedance (which will probably be NEGATIVE for oscillators). Additionally, the decoupling circuit should not have high Q, it should have loss intentionally introduced to the inductance.

    Typically, this is by means of series resistance which is determined empirically. If the tank inductor has a reactance of +j 150 at the frequency of oscillation, then I'd want the decoupling inductance to have a reactance of at least twice that amount in series with a resistance of about half the magnitude (~150 ohm resistor in series with +j 300).

    In many cases where noise isn't a problem, it's simpler and better to decouple resistively. This is the best scenario for avoiding spurious oscillations. However the resistor(s) must necessarily be high in value and therefore both FM and AM noise of the circuit will be increased by the noise voltage of the decoupling resistor, R:

    Vn = (4KTBR)^2

    This is almost never a problem with a power amplifier or even a general purpose small signal amplifier. It should be avoided for any low noise application, whether amplifier or oscillator.

    I hope that this is helpful. YOu'll appreciate that much of this is based on trial and error experience :)

    Cheers,
    Randy

     
    • Hi,

      I'm the author of the old workbook ... It could be great to update the doc with
      your design in order to exchange with beginners how we can design using QUCS.
      And also publish the project files if not confidential for sure.

      Thx for your contribution,
      Thierry.

      Quoting randyc randy9944@users.sf.net:

      Hi, I'm glad to know that you're making progress. I'll illustrate the
      decoupling inductance values with a couple of examples.

      Example 1: A bipolar transistor operating in linear, small-signal mode
      requires an inductor to decouple the base from the bias network. From
      S-parameters, the input matching network has been designed to provide a
      conjugate match at the transistor base of 22 +j35.

      We assume that the reactive part of S11 is matched by +j35 so the transistor
      input impedance is 22 ohms real. By our rule of thumb (inductive reactance
      is 3 to 5 times the real part of the impedance) the minimum inductance would
      be 3 x 22 or +j 66 ohms at the operating frequency. (Higher is better if no
      spurious oscillation results.)

      Example 2: An OSCILLATOR requires similar base decoupling but the situation
      is complicated by the fact that the tank (resonant) circuit is also connected
      to the transistor base. Any reactive component common to this point is
      likely to shift the operating frequency, lower the Q of the tank circuit,
      cause a spurious oscillation or ALL THREE.

      In this example, the reactance of the decoupling inductor should be higher
      than the tank circuit reactance, rather than the real part of the transistor
      input impedance (which will probably be NEGATIVE for oscillators).
      Additionally, the decoupling circuit should not have high Q, it should have
      loss intentionally introduced to the inductance.

      Typically, this is by means of series resistance which is determined
      empirically. If the tank inductor has a reactance of +j 150 at the frequency
      of oscillation, then I'd want the decoupling inductance to have a reactance
      of at least twice that amount in series with a resistance of about half the
      magnitude (~150 ohm resistor in series with +j 300).

      In many cases where noise isn't a problem, it's simpler and better to
      decouple resistively. This is the best scenario for avoiding spurious
      oscillations. However the resistor(s) must necessarily be high in value and
      therefore both FM and AM noise of the circuit will be increased by the noise
      voltage of the decoupling resistor, R:

      Vn = (4KTBR)^2

      This is almost never a problem with a power amplifier or even a general
      purpose small signal amplifier. It should be avoided for any low noise
      application, whether amplifier or oscillator.

      I hope that this is helpful. YOu'll appreciate that much of this is based on
      trial and error experience :)

      Cheers,
      Randy


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      • domispace
        domispace
        2013-05-18

        Hi Thierry,

        I am not sure I have understand what you meant by "update the doc with your design" - nor if your post was adressed to me, as Randyc said... Do you mean using the schematic of my Class-C PA for a tutorial in the Qucs Workbook? If this is what you meant, I see no problem since the design I used is derived from books' schematics, so nothing is confidential...

        It would be great to have an example of Class-C PA in order to begin functionnal designs from a mature, working schematic. Mine has to get many corrections and optimizations in order to become a true Class-C PA!

         
    • domispace
      domispace
      2013-05-18

      Hi Randyc,

      Thank you again for your comments and advices. The design is making progress but is quite empirical, i.e. I improve it "manually" (by changing the real components values) because I was not yet able to get a correct Qucs schematic. But this is very important so I think I will work harder on this later, and I will report my experience. :) Also I will try to get benefits from your advices!

      Regards,

       
  • randyc
    randyc
    2013-05-15

    Hello Thierry,

    I assume that you are responding to the O.P. however you included MY last post which confuses me :)

    Cheers,
    randyc

     
  • randyc
    randyc
    2013-05-23

    Hi Domispace:

    Class "C" amplifiers are almost universally optimized empirically. This doesn't reflect on your design skills at all, there are many variables involved in these non-linear circuits.

    As I noted in my first post, it is my opinion that "on the bench" optimization for this type of circuit is much more time-efficient than computer simulations where you are mostly at the mercy of those who developed the semiconductor model probably from measurements made by others :)

    Anecdotally, there were occasions where collector efficiency mandated Class "C" configuration from a transistor characterized only for "linear" performance. (The reasons are many but as an example, when I worked at Space Systems designing satellite hardware, a limited choice of semiconductors were available, based on their reliability and screening.)

    The design technique that I chose to employ, lacking Class "C" matching information, used S-parameters at the maximum collector current that the device was characterized. Plotting S11 and S22 on the Smith chart and assuming that the resistive parts would be much less due to increased drive, I moved (diminished) the plotted points along the resistive curve of the Smith chart about 30% lower, as a starting point.

    From these estimated points, matching circuits were designed and the amplifier "breadboarded". Performance optimization from this point was completely empirical and surprisingly efficient when bandwidth and output power requirements were reasonable (e.g. 5% bandwidth, 3 watts or less).

    Oh well, I meander along - forgive an old guy his reminiscences and continue with enthusiasm. It's a wonderful thing to learn new techniques and skills when one is beginning one's career ! I envy you 

    Best wishes,
    randyc

     
  • domispace
    domispace
    2013-05-25

    Hi Randyc,

    Thanks for your method, which is new for me! I think I will try it soon, when I will have more time. It seems very interesting!

    It seems your are right about simulations, empirical optimizations and time-efficiency. I designed the transistor model myself, though I used measurements made by others as you said, as well. ;) But this does not work, I wonder why Qucs is not able to solve (transient simulations) or why the analysis freezes. So this shows that I should use empirical optimizations.

    Your story was very, very interesting, especially about the space hardware (do you mean Space Systems/Loral ?). Electronics for space, this is exactly the domain in which I absolutely want to work in. For this I am currently in 5th year in university and I hope I will get a job in the domain... I am ardent in this two worlds!

    Again, I will tell you what are the results given by my different simulations, but for now I am currently designing other parts of my system. Then I will optimize all the system, which is only roughly designed currently.

     
  • randyc
    randyc
    2013-05-25

    Hello again,

    Yes, that was Space Systems Loral in Palo Alto. Coincidentally, I had dinner with friends two nights ago when I passed through Santa Clara, one of whom still works at Space Systems. I understand that their business is slow at the moment and some have been offerred early retirement and so forth.

    A similar situation developed when I was there, over ten years ago. That is the problem with the space business: it is dependant on the budgets of entire countries since corporations generally do not have the resources to buy satellites ! Political decisions in other countries can have dramatic effect on companies like Space Systems, TRW and Lockheed.

    Before working for Space Systems, I had a long design history with defense/aerospace work which tends to be similar to space work in that similar parts are used (hi-reliability). In point of fact, defense work is usually more strenuous since space environment (except for the actual launch and ambient orbital radiation) is incredibly benign.

    This is a long-winded means of suggesting that you don't limit yourself to designing space hardware - it may be difficult to make the transition in the other direction if it becomes necessary.

    Best wishes,
    randyc