CVS: powertweak/xml/pci/VIA 82C686A.xml,1.3,1.4 82C691.xml,1.1,1.2

[Dave J. <da...@us...>]

Update of /cvsroot/powertweak/powertweak/xml/pci/VIA
In directory usw-pr-cvs1:/tmp/cvs-serv7291

Modified Files:
	82C686A.xml 82C691.xml 
Log Message:
Disable memory interleave tweak for 691.



Index: 82C686A.xml
===================================================================
RCS file: /cvsroot/powertweak/powertweak/xml/pci/VIA/82C686A.xml,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -r1.3 -r1.4
*** 82C686A.xml	2001/01/16 09:50:11	1.3
--- 82C686A.xml	2001/04/03 02:15:50	1.4
***************
*** 7,10 ****
--- 7,11 ----
  There is a stability problem with the Memory Interleave settings.
  Until we find more documentation, they are disabled.
+ --Probably tristate (See 82C691.xml) -davej
  
  -->

Index: 82C691.xml
===================================================================
RCS file: /cvsroot/powertweak/powertweak/xml/pci/VIA/82C691.xml,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -r1.1 -r1.2
*** 82C691.xml	2001/01/16 09:50:11	1.1
--- 82C691.xml	2001/04/03 02:15:50	1.2
***************
*** 39,42 ****
--- 39,51 ----
  	</REGISTER>
  
+ <!--
+ // This set of tweaks disabled for now.
+ These tweaks should be tristate rather than boolean.
+ 
+ 00-none
+ 01-2 way interleave
+ 10-4 way interleave
+ 11-invalid
+ 
  	<REGISTER base="0x64">
  	<FRAME>Memory Interleave settings</FRAME>
***************
*** 85,88 ****
--- 94,107 ----
  improve memory throughput by 20% on some sytems.</DESCRIPTION>
  	<CONFIGNAME>BANK4_INTERLEAVE</CONFIGNAME>
+ 	</REGISTER>
+ -->
+ 
+ 	<REGISTER base="0x68" bit="2">
+ 	<FRAME>DRAM settings</FRAME>
+ 	<TYPE>Checkbox</TYPE>
+ 	<WIDGETTEXT>Burst refresh</WIDGETTEXT>
+ 	<DESCRIPTION>This option enables `bursting' during
+ refresh cycles. Enabled is faster.</DESCRIPTION>
+ 	<CONFIGNAME>DRAM_BURSTREFRESH</CONFIGNAME>
  	</REGISTER>