The xor gate IEC
in the file pgflibraryshapes.gates.logic.IEC.code.tex
(starting at line 477) does not support 3 or more legs although all the other gates do.
I'm not sure if this is a bug or a conscious decision, but simply setting the according constant from 2 to 1024 (as is the case for the other gates) seems to resolve the problem.
Diff:
I am pritty sure that this is done by intention. The corresponding manual section one can read the number of allowed inputs for each of the gates and for
xor gate IEC
andxnor gate IEC
it is explicitly written that two inputs (only) are allowed.I can follow this "decision" when I read https://en.wikipedia.org/w/index.php?title=XOR_gate&oldid=874532784#More_than_two_inputs. Hopefully you agree that the decision for two inputs (only) was most likely on purpose.