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Diff of /docs/man3/libpfm_intel_nhm.3 [60cdc9] .. [4ba6cc] Maximize Restore

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--- a/docs/man3/libpfm_intel_nhm.3
+++ b/docs/man3/libpfm_intel_nhm.3
@@ -1,4 +1,4 @@
-.TH LIBPFM 3  "September, 2009" "" "Linux Programmer's Manual"
+.TH LIBPFM 4  "September, 2009" "" "Linux Programmer's Manual"
 .SH NAME
 libpfm_intel_nhm - support for Intel Nehalem core PMU
 .SH SYNOPSIS
@@ -7,8 +7,6 @@
 .sp
 .B PMU name: nhm
 .B PMU desc: Intel Nehalem
-.B PMU name: nhm_ex
-.B PMU desc: Intel Nehalem EX
 .sp
 .SH DESCRIPTION
 The library supports the Intel Nehalem core PMU. It should be noted that
@@ -20,21 +18,17 @@
 The following modifiers are supported on Intel Nehalem processors:
 .TP
 .B u
-Measure at user level which includes privilege levels 1, 2, 3. This corresponds to \fBPFM_PLM3\fR.
-This is a boolean modifier.
+Measure at user level which includes privilege levels 1, 2, 3. This is a boolean modifier.
 .TP
 .B k
-Measure at kernel level which includes privilege level 0. This corresponds to \fBPFM_PLM0\fR.
-This is a boolean modifier.
+Measure at kernel level which includes privilege level 0. This is a boolean modifier.
 .TP
 .B i
 Invert the meaning of the event. The counter will now count cycles in which the event is \fBnot\fR
 occurring. This is a boolean modifier
 .TP
 .B e
-Enable edge detection, i.e., count only when there is a state transition from no occurrence of the event
-to at least one occurrence. This modifier must be combined with a counter mask modifier (m) with a value greater or equal to one.
-This is a boolean modifier.
+Enable edge detection, i.e., count only when there is a state transition. This is a boolean modifier.
 .TP
 .B c
 Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles
@@ -43,29 +37,10 @@
 .TP
 .B t
 Measure on both threads at the same time assuming hyper-threading is enabled. This is a boolean modifier.
-.TP
-.B ldlat
-Pass a latency threshold to the MEM_INST_RETIRED:LATENCY_ABOVE_THRESHOLD event.
-This is an integer attribute that must be in the range [3:65535]. It is required
-for this event.  Note that the event must be used with precise sampling (PEBS).
 
-.SH OFFCORE_RESPONSE event
-The library is able to encode the OFFCORE_RESPONSE_0 event. This is a special event because it
-needs a second MSR (0x1a6) to be programmed for the event to count properly. Thus two values
-are necessary. The first value can be programmed on any of the generic counters. The second value
-goes into the dedicated MSR (0x1a6).
-
-The OFFCORE_RESPONSE event is exposed as a normal event with several umasks which are divided in two
-groups: request and response. The user must provide \fBat least\fR one umask from each group.
-For instance, OFFCORE_RESPONSE_0:ANY_DATA:LOCAL_DRAM.
-
-When using \fBpfm_get_event_encoding()\fR, two 64-bit values are returned. The first value
-corresponds to what needs to be programmed into any of the generic counters. The second value
-must be programmed into the dedicated MSR (0x1a6).
-
-When using an OS-specific encoding routine, the way the event is encoded is OS specific. Refer to
-the corresponding man page for more information.
-
+.SH ENVIRONMENT VARIABLES
+It is possible to force activation of the Intel Nehalem support using the \fBLIBPFM_FORCE_PMU\fR variable.
+The PMU name, nhm, must be passed. No additional options are supported.
 .SH AUTHORS
 .nf
 Stephane Eranian <eranian@gmail.com>