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<tr><td>Group 0 </td><td>	Processor Cycles </td><td> (counter</td><td>
</td>

</tr>

<tr><td>Group 0 </td><td>	SPU Processor Cycles </td><td> (counter</td><td>
</td>

</tr>

<tr><td>Group 21 </td><td>	Branch instruction committed.  </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Branch instruction that caused a misprediction flush is committed. Branch misprediction includes: (1) misprediction of taken or not-taken on conditional branch, (2) misprediction of branch target address on bclr[1] and bcctr[1].  </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Instruction buffer empty.  </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Instruction effective-address-to-real-address translation (I-ERAT) miss.  </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	L1 Instruction cache miss cycles. Counts the cycles from the miss event until the returned instruction is dispatched or cancelled due to branch misprediction, completion restart, or exceptions (see Note 1).  </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Valid instruction available for dispatch, but dispatch is blocked. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Instruction in pipeline stage EX7 causes a flush.  </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 21 </td><td>	Two PowerPC instructions committed. For microcode sequences, only the last microcode operation is counted. Committed instructions are counted two at a time. If only one instruction has committed for a given cycle, this event will not be raised until another instruction has been committed in a future cycle.  </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 22 </td><td>	Data effective-address-to-real-address translation (D-ERAT) miss. Not speculative.  </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 22 </td><td>	Store request counted at the L2 interface. Counts microcoded PPE sequences more than once (see Note 1 for exceptions). (Thread 0 and 1) </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 22 </td><td>	Load valid at a particular pipe stage. Speculative, since flushed operations are counted as well. Counts microcoded PPE sequences more than once. Misaligned flushes might be counted the first time as well. Load operations include all loads that read data from the cache, dcbt and dcbtst. Does not include load Vector/SIMD multimedia extension pattern instructions.  </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 22 </td><td>	L1 D-cache load miss. Pulsed when there is a miss request that has a tag miss but not an ERAT miss. Speculative, since flushed operations are counted as well.  </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[optional ]
 <br />
	0x20: PPU Bus Word 1				[default ]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Load from MFC memory-mapped I/O (MMIO) space. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Stores to MFC MMIO space. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Request token for even memory bank numbers 0-14. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Receive 8-beat data from the Element Interconnect Bus (EIB). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Send 8-beat data to the EIB. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Send a command to the EIB; includes retried commands. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	Cycles between data request and data grant. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 31 </td><td>	The five-entry Non-Cacheable Unit (NCU) Store Command queue not empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	Cache hit for core interface unit (CIU) loads and stores. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	Cache miss for CIU loads and stores. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	CIU load miss. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	CIU store to Invalid state (miss). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	Load word and reserve indexed (lwarx/ldarx) for Thread 0 hits Invalid cache state </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	Store word conditional indexed (stwcx/stdcx) for Thread 0 hits Invalid cache state when reservation is set. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 32 </td><td>	All four snoop state machines busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Data line claim (dclaim) that received good combined response; includes store/stcx/dcbz to Shared (S), Shared Last (SL),or Tagged (T) cache state; does not include dcbz to Invalid (I) cache state (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Dclaim converted into rwitm; may still not get to the bus if stcx is aborted (see Note 2). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Store to modified (M), modified unsolicited (MU), or exclusive (E) cache state. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	8-entry store queue (STQ) full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Store dispatched to RC machine is acknowledged. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Gatherable store (type = 00000) received from CIU. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Snoop push. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Send intervention from (SL | E) cache state to a destination within the same CBE chip. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Send intervention from (M | MU) cache state to a destination within the same CBE chip. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Respond with Retry to a snooped request due to one of the following conflicts: read-and-claim state machine (RC) full address, castout (CO) congruence class, snoop (SNP) machine full address, all snoop machines busy, directory lockout, or parity error. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Respond with Retry to a snooped request because all snoop machines are busy. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Snooped response causes a cache state transition from (M | MU) to (E | S | T). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Snooped response causes a cache state transition from E to S. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Snooped response causes a cache state transition from (E | SL | S | T) to Invalid (I). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 33 </td><td>	Snooped response causes a cache state transition from (M | MU) to I. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 34 </td><td>	Load and reserve indexed (lwarx/ldarx) for Thread 1 hits Invalid cache state. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 34 </td><td>	Store conditional indexed (stwcx/stdcx) for Thread 1 hits Invalid cache state. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	Non-cacheable store request received from CIU; includes all synchronization operations such as sync and eieio. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	sync received from CIU. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	Non-cacheable store request received from CIU; includes only stores. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	eieio received from CIU. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	tlbie received from CIU. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	sync at the bottom of the store queue, while waiting on st_done signal from the Bus Interface Unit (BIU) and sync_done signal from L2. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	lwsync at the bottom of the store queue, while waiting for a sync_done signal from the L2. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	eieio at the bottom of the store queue, while waiting for a st_done signal from the BIU and a sync_done signal from the L2. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	tlbie at the bottom of the store queue, while waiting for a st_done signal from the BIU. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	Non-cacheable store combined with the previous non-cacheable store with a contiguous address. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	Load request canceled by CIU due to late detection of load-hit-store condition (128B boundary). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	NCU detects a load hitting a previous store to an overlapping address (32B boundary). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	All four store-gather buffers full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	Non-cacheable load request received from CIU; includes instruction and data fetches. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	The four-deep store queue not empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	The four-deep store queue full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 35 </td><td>	At least one store gather buffer not empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Dual instruction committed. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Single instruction committed. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Pipeline 0 instruction committed. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Pipeline 1 instruction committed. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Instruction fetch stall. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Local storage busy. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	DMA may conflict with load or store. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Store instruction to local storage issued. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Load intruction from local storage issued. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Floating-Point Unit (FPU) exception. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Branch instruction committed. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Non-sequential change of the SPU program counter, which can be caused by branch, asynchronous interrupt, stalled wait on channel, error correction code (ECC) error, and so forth. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Branch not taken. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Branch miss prediction; not exact. Certain other code sequences can cause additional pulses on this signal (see Note 2). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Branch hint miss prediction; not exact. Certain other code sequences can cause additional pulses on this signal (see Note 2). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Instruction sequence error. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on any blocking channel write (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on External Event Status (Channel 0) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on Signal Notification 1 (Channel 3) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on Signal Notification 2 (Channel 4) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on DMA Command Opcode or ClassID Register (Channel 21) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on Tag Group Status (Channel 24) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on List Stall-and-Notify Tag Status (Channel 25) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on PPU Mailbox (Channel 28) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 41 </td><td>	Stalled waiting on SPU Mailbox (Channel 29) (see Note 3). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x110: SPU Bus Word 0				[default ]
 <br />
	0x140: SPU Bus Word 2				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 42 </td><td>	Stalled waiting on channel operation (See Note 2). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x104: SPU Trigger 0				[default ]
 <br />
	0x114: SPU Trigger 1				[optional ]
 <br />
	0x124: SPU Trigger 2				[optional ]
 <br />
	0x134: SPU Trigger 3				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 43 </td><td>	Instruction fetch stall. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity			[optional ]
 <br />
	0x02: Positive polarity			[default ]
 <br />
	0x144: SPU Event 0				[default ]
 <br />
	0x154: SPU Event 1				[optional ]
 <br />
	0x164: SPU Event 2				[optional ]
 <br />
	0x174: SPU Event 3				[optional ]
 <br />
	0x00: SPU 0					[default ]
 <br />
	0x1000: SPU 1					[optional ]
 <br />
	0x2000: SPU 2					[optional ]
 <br />
	0x3000: SPU 3					[optional ]
 <br />
	0x4000: SPU 4					[optional ]
 <br />
	0x5000: SPU 5					[optional ]
 <br />
	0x6000: SPU 6					[optional ]
 <br />
	0x7000: SPU 7					[optional ]
 <br />
</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of read and rwitm commands including atomic AC1 to AC0. (Group 1)</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of dclaim commands including atomic AC1 to AC0. (Group 1)</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of wwk, wwc, and wwf commands from AC1 to AC0. Group 1</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of sync, tlbsync, and eieio commands from AC1 to AC0. Group 1</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of tlbie commands from AC1 to AC0. Group 1</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Previous adjacent address match PAAM Content Addressable Memory (CAM) hit. (Group 1)</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	PAAM CAM miss. Group 1</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Command reflected. Group 1</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of read and rwitm commands including atomic AC1 to AC0. (Group 2)</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of dclaim commands including atomic AC1 to AC0. (Group 2)</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of wwk, wwc, and wwf commands from AC1 to AC0. Group 2</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of sync, tlbsync, and eieio commands from AC1 to AC0. Group 2</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Number of tlbie commands from AC1 to AC0. Group 2</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	PAAM CAM hit. Group 2</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	PAAM CAM miss. Group 2</td>

</tr>

<tr><td>Group 61 </td><td> </td><td> (counter</td><td>	Command reflected. Group 2</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 6. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 4. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 2. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from PPE. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 3. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 5. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	Local command from SPE 7. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 6. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 4. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 2. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from PPE. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 3. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 5. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1-to-AC0 global command from SPE 7. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1 sends a global command to AC0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC0 reflects a global command back to AC1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 62 </td><td>	AC1 reflects a command back to the bus masters. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Grant on data ring 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Grant on data ring 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Grant on data ring 2. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Grant on data ring 3. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Data ring 0 is in use. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Data ring 1 is in use. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Data ring 2 is in use. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Data ring 3 is in use. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	All data rings are idle. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	One data ring is busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	Two or three data rings are busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	All data rings are busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	BIC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 6 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 4 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 2 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 0 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	MIC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	PPE data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 1 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 3 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 5 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 7 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	IOC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	BIC is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 6 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 4 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 2 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 0 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	MIC is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	PPE is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 63 </td><td>	SPE 1 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	BIC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 6 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 4 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 2 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 0 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	MIC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	PPE data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 1 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 3 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 5 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 7 data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	IOC data request pending. </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	BIC is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 6 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 4 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 2 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 0 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	MIC is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	PPE is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 1 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 3 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 5 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	SPE 7 is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	IOC is data destination. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	Grant on data ring 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	Grant on data ring 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	Grant on data ring 2. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	Grant on data ring 3. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	All data rings are idle. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	One data ring is busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	Two or three data rings are busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 64 </td><td>	All four data rings are busy. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Even XIO token unused by RAG 0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Odd XIO token unused by RAG 0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Even bank token unused by RAG 0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Odd bank token unused by RAG 0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 1. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 2. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 3. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 4. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 5. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 6. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 651 </td><td>	Token granted for SPE 7. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Even XIO token wasted by RAG 0; valid only when Unused Enable (UE) = 1 in TKM_CR register. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Odd XIO token wasted by RAG 0; valid only when Unused Enable (UE) = 1 in TKM_CR register. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Even bank token wasted by RAG 0; valid only when Unused Enable (UE) = 1 in TKM_CR register. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Odd bank token wasted by RAG 0; valid only when Unused Enable (UE) = 1 in TKM_CR register. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Even XIO token wasted by RAG U. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Odd XIO token wasted by RAG U. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Even bank token wasted by RAG U. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 652 </td><td>	Odd bank token wasted by RAG U. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even XIO token from RAG 0 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even XIO token from RAG 0 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even XIO token from RAG 0 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd XIO token from RAG 0 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd XIO token from RAG 0 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd XIO token from RAG 0 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even bank token from RAG 0 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even bank token from RAG 0 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Even bank token from RAG 0 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd bank token from RAG 0 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd bank token from RAG 0 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 653 </td><td>	Odd bank token from RAG 0 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd bank token from RAG U shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even XIO token from RAG 1 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even XIO token from RAG 1 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even XIO token from RAG 1 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd XIO token from RAG 1 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd XIO token from RAG 1 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd XIO token from RAG 1 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even bank token from RAG 1 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even bank token from RAG 1 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even bank token from RAG 1 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd bank token from RAG 1 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd bank token from RAG 1 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd bank token from RAG 1 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even XIO token from RAG U shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd XIO token from RAG U shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Even bank token from RAG U shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 656 </td><td>	Odd bank token from RAG U shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	Even XIO token unused by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	Odd XIO token unused by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	Even bank token unused by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	Odd bank token unused by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	IOIF0 In token unused by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	IOIF0 Out token unused by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	IOIF1 In token unused by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 657 </td><td>	IOIF1 Out token unused by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 658 </td><td>	Even XIO token wasted by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 658 </td><td>	Odd XIO token wasted by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 658 </td><td>	Even bank token wasted by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 658 </td><td>	Odd bank token wasted by RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even XIO token from RAG 2 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even XIO token from RAG 2 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even XIO token from RAG 2 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd XIO token from RAG 2 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd XIO token from RAG 2 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd XIO token from RAG 2 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even bank token from RAG 2 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even bank token from RAG 2 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Even bank token from RAG 2 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd bank token from RAG 2 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd bank token from RAG 2 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 659 </td><td>	Odd bank token from RAG 2 shared with RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6510 </td><td>	IOIF0 In token wasted by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6510 </td><td>	IOIF0 Out token wasted by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6510 </td><td>	IOIF1 In token wasted by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6510 </td><td>	IOIF1 Out token wasted by RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6512 </td><td>	Even XIO token wasted by RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6512 </td><td>	Odd XIO token wasted by RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6512 </td><td>	Even bank token wasted by RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6512 </td><td>	Odd bank token wasted by RAG 3 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even XIO token from RAG 3 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even XIO token from RAG 3 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even XIO token from RAG 3 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd XIO token from RAG 3 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd XIO token from RAG 3 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd XIO token from RAG 3 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even bank token from RAG 3 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even bank token from RAG 3 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Even bank token from RAG 3 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd bank token from RAG 3 shared with RAG 0 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd bank token from RAG 3 shared with RAG 1 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 6513 </td><td>	Odd bank token from RAG 3 shared with RAG 2 </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x40: PPU Bus Word 2				[mandatory]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Read command queue is empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Write command queue is empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Read command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - MIC responds with a Retry for a read command because the read command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Write command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - MIC responds with a Retry for a write command because the write command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Read command dispatched; includes high-priority and fast-path reads (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Write command dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Read-Modify-Write command (data size < 16 bytes) dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Refresh dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Byte-masking write command (data size >= 16 bytes) dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Write command dispatched after a read command was previously dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 71 </td><td>	XIO1 - Read command dispatched after a write command was previously dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Read command queue is empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Write command queue is empty. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Read command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - MIC responds with a Retry for a read command because the read command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Write command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - MIC responds with a Retry for a write command because the write command queue is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Read command dispatched; includes high-priority and fast-path reads (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Write command dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Read-Modify-Write command (data size < 16 bytes) dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Refresh dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Write command dispatched after a read command was previously dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 72 </td><td>	XIO0 - Read command dispatched after a write command was previously dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 73 </td><td>	XIO0 - Write command dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 73 </td><td>	XIO0 - Read-Modify-Write command (data size < 16 bytes) dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 73 </td><td>	XIO0 - Refresh dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 73 </td><td>	XIO0 - Byte-masking write command (data size >= 16 bytes) dispatched (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x30: PPU Bus Word 0/1				[default ]
 <br />
	0xc0: PPU Bus Word 2/3				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type A data physical layer group (PLG). Does not include header-only or credit-only data PLGs. In IOIF mode, counts I/O device read data; in BIF mode, counts all outbound data. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type B data PLG. In IOIF mode, counts I/O device read data; in BIF mode, counts all outbound data. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type A data PLG. Does not include header-only or credit-only PLGs. In IOIF mode, counts CBE store data to I/O device. Does not apply in BIF mode. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type B data PLG. In IOIF mode, counts CBE store data to an I/O device. Does not apply in BIF mode. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Data PLG. Does not include header-only or credit-only PLGs. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Command PLG (no credit-only PLG). In IOIF mode, counts I/O command or reply PLGs. In BIF mode, counts command/ reflected command or snoop/combined responses. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type A data transfer regardless of length. Can also be used to count Type A data header PLGs (but not credit-only PLGs). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Type B data transfer. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Command-credit-only command PLG in either IOIF or BIF mode. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Data-credit-only data PLG sent in either IOIF or BIF mode. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Non-null envelope sent (does not include long envelopes). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Null envelope sent (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	No valid data sent this cycle (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Normal envelope sent (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Long envelope sent (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	A Null PLG inserted in an outgoing envelope. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 81 </td><td>	Outbound envelope array is full. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 82 </td><td>	Type B data transfer. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Null envelope received (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Command PLG, but not credit-only PLG. In IOIF mode, counts I/O command or reply PLGs. In BIF mode, counts command/reflected command or snoop/combined responses. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Command-credit-only command PLG. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Normal envelope received is good (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Long envelope received is good (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Data-credit-only data PLG in either IOIF or BIF mode; will count a maximum of one per envelope (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Non-null envelope; does not include long envelopes; includes retried envelopes (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Data grant received. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Data PLG. Does not include header-only or credit-only PLGs. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Type A data transfer regardless of length. Can also be used to count Type A data header PLGs, but not credit-only PLGs. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 83 </td><td>	Type B data transfer. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Null envelope received (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Command PLG (no credit-only PLG). Counts I/O command or reply PLGs. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Command-credit-only command PLG. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Normal envelope received is good (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Long envelope received is good (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Data-credit-only data PLG received; will count a maximum of one per envelope (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Non-Null envelope received; does not include long envelopes; includes retried envelopes (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Data grant received. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Data PLG received. Does not include header-only or credit-only PLGs. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Type I A data transfer regardless of length. Can also be used to count Type A data header PLGs (but not credit-only PLGs). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 84 </td><td>	Type B data transfer received. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Received MMIO read targeted to IOIF1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Received MMIO write targeted to IOIF1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Received MMIO read targeted to IOIF0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Received MMIO write targeted to IOIF0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Sent command to IOIF0. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 85 </td><td>	Sent command to IOIF1. </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	IOIF0 Dependency Matrix 3 is occupied by a dependent command (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	IOIF0 Dependency Matrix 4 is occupied by a dependent command (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	IOIF0 Dependency Matrix 5 is occupied by a dependent command (see Note 1). </td><td> (counter</td><td>
	0x00: Count edges				[optional ]
 <br />
	0x01: Count cycles				[default ]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	Received read request from IOIF0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	Received write request from IOIF0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 86 </td><td>	Received interrupt from the IOIF0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token for even memory banks 0-14 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token for odd memory banks 1-15 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 1, 3, 5, or 7 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 9, 11, 13, or 15 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 16 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 17 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 18 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 87 </td><td>	IOIF0 request for token type 19 (see Note 1). </td><td> (counter</td><td>
	0x01: Count cycles				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	I/O page table cache hit for commands from IOIF. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	I/O page table cache miss for commands from IOIF. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	I/O segment table cache hit. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	I/O segment table cache miss. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	Interrupt received from any SPU (reflected cmd when IIC has sent ACK response). </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	Internal interrupt controller (IIC) generated interrupt to PPU thread 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	IIC generated interrupt to PPU thread 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	Received external interrupt (using MMIO) from PPU to PPU thread 0. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	Received external interrupt (using MMIO) from PPU to PPU thread 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>

<tr><td>Group 88 </td><td>	Received external interrupt (using MMIO) from PPU to PPU thread 1. </td><td> (counter</td><td>
	0x00: Count edges				[mandatory]
 <br />
	0x00: Negative polarity				[optional ]
 <br />
	0x02: Positive polarity				[default ]
 <br />
	0x10: PPU Bus Word 0				[default ]
 <br />
	0x40: PPU Bus Word 2				[optional ]
 <br />
</td>

</tr>