From: Chad R. <cr...@ca...> - 2007-04-16 23:24:26
Attachments:
oprofile-0.9.2-octeon.patch
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The attached patch adds support for all of the performance counters supported by the Cavium Networks Octeon processor family. This works on all CN3XXX and CN5XXX chips. This is my first submittal to the oprofile list. Hope the format is ok. Thanks, Chad |
From: William C. <wc...@re...> - 2007-04-17 14:26:34
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Chad Reese wrote: > The attached patch adds support for all of the performance counters > supported by the Cavium Networks Octeon processor family. This works > on all CN3XXX and CN5XXX chips. > > This is my first submittal to the oprofile list. Hope the format is ok. > > Thanks, > > Chad ... > diff -upNr oprofile-0.9.2/events/mips/octeon/unit_masks oprofile-0.9.2-octeon/events/mips/octeon/unit_masks > --- oprofile-0.9.2/events/mips/octeon/unit_masks 1969-12-31 16:00:00.000000000 -0800 > +++ oprofile-0.9.2-octeon/events/mips/octeon/unit_masks 2006-11-02 16:47:46.000000000 -0800 > @@ -0,0 +1,5 @@ > +# > +# MIPS Octeon possible unit masks > +# > +name:zero type:mandatory default:0x0 > + 0x0 No unit mask > diff -upNr oprofile-0.9.2/libop/op_cpu_type.c oprofile-0.9.2-octeon/libop/op_cpu_type.c > --- oprofile-0.9.2/libop/op_cpu_type.c 2006-08-23 07:23:51.000000000 -0700 > +++ oprofile-0.9.2-octeon/libop/op_cpu_type.c 2006-11-02 16:47:46.000000000 -0800 > @@ -59,6 +59,7 @@ static struct cpu_descr const cpu_descrs > { "Sibyte SB1", "mips/sb1", CPU_MIPS_SB1, 4 }, > { "NEC VR5432", "mips/vr5432", CPU_MIPS_VR5432, 2 }, > { "NEC VR5500", "mips/vr5500", CPU_MIPS_VR5500, 2 }, > + { "Cavium Octeon", "mips/octeon", CPU_MIPS_OCTEON, 2 }, > { "e500", "ppc/e500", CPU_PPC_E500, 4 }, > { "e500v2", "ppc/e500v2", CPU_PPC_E500_2, 4 }, > { "Core Solo / Duo", "i386/core", CPU_CORE, 2 }, Add this entry to the end of the list to improve/maintain backward compatibility. > diff -upNr oprofile-0.9.2/libop/op_cpu_type.h oprofile-0.9.2-octeon/libop/op_cpu_type.h > --- oprofile-0.9.2/libop/op_cpu_type.h 2006-08-23 07:23:51.000000000 -0700 > +++ oprofile-0.9.2-octeon/libop/op_cpu_type.h 2006-11-02 16:47:46.000000000 -0800 > @@ -55,6 +55,7 @@ typedef enum { > CPU_MIPS_SB1, /**< Broadcom SB1 */ > CPU_MIPS_VR5432, /**< NEC VR5432 */ > CPU_MIPS_VR5500, /**< MIPS VR5500, VR5532 and VR7701 */ > + CPU_MIPS_OCTEON, /**< Cavium Octeon */ > CPU_PPC_E500, /**< e500 */ > CPU_PPC_E500_2, /**< e500v2 */ > CPU_CORE, /**< Core Solo / Duo series */ Add to end of list for same reason as above. -Will |
From: Chad R. <cr...@ca...> - 2007-04-17 16:14:28
Attachments:
oprofile-0.9.2-octeon.patch
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Will, thanks for the feedback. Attached is an updated patch for the Cavium Networks Octeon processor family. This patch moves the Octeon to the bottom of the CPU array. Other parts of the code, which appear to be ordered by architecture, were left as is. Chad |