[Madwifi-cvs] madwifi/ath if_ath_pci.c,1.1.2.3,1.1.2.4

[Sam L. <sam...@us...>]

Update of /cvsroot/madwifi/madwifi/ath
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv25296

Modified Files:
      Tag: WPA
	if_ath_pci.c 
Log Message:
Disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
from interfering with C3 CPU state.  This appears to fix various
instances of PCI bus dma errors (manifested as "hardware error, resetting").

Submitted by:   Joachim Gleissner


Index: if_ath_pci.c
===================================================================
RCS file: /cvsroot/madwifi/madwifi/ath/Attic/if_ath_pci.c,v
retrieving revision 1.1.2.3
retrieving revision 1.1.2.4
diff -C2 -d -r1.1.2.3 -r1.1.2.4
*** if_ath_pci.c	9 Jun 2004 18:33:20 -0000	1.1.2.3
--- if_ath_pci.c	17 Jun 2004 15:45:38 -0000	1.1.2.4
***************
*** 98,101 ****
--- 98,102 ----
  	const char *athname;
  	u_int8_t csz;
+ 	u32 val;
  
  	if (pci_enable_device(pdev))
***************
*** 133,136 ****
--- 134,147 ----
  	pci_set_master(pdev);
  
+ 	/*
+ 	 * Disable the RETRY_TIMEOUT register (0x41) to keep
+ 	 * PCI Tx retries from interfering with C3 CPU state.
+ 	 *
+ 	 * Code taken from ipw2100 driver - jg
+ 	 */
+ 	pci_read_config_dword(pdev, 0x40, &val);
+ 	if ((val & 0x0000ff00) != 0)
+ 		pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
+ 
  	phymem = pci_resource_start(pdev, 0);
  	if (!request_mem_region(phymem, pci_resource_len(pdev, 0), "ath")) {
***************
*** 236,242 ****
--- 247,264 ----
  	struct net_device *dev = pci_get_drvdata(pdev);
  	struct ath_pci_softc *sc = dev->priv;
+ 	u32 val;
  
  	pci_enable_device(pdev);
  	pci_restore_state(pdev, sc->aps_pmstate);
+ 	/*
+ 	 * Suspend/Resume resets the PCI configuration space, so we have to
+ 	 * re-disable the RETRY_TIMEOUT register (0x41) to keep
+ 	 * PCI Tx retries from interfering with C3 CPU state
+ 	 *
+ 	 * Code taken from ipw2100 driver - jg
+ 	 */
+ 	pci_read_config_dword(pdev, 0x40, &val);
+ 	if ((val & 0x0000ff00) != 0)
+ 		pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
  	ath_resume(dev);